K4T51043QB-GCCC SAMSUNG [Samsung semiconductor], K4T51043QB-GCCC Datasheet - Page 13

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K4T51043QB-GCCC

Manufacturer Part Number
K4T51043QB-GCCC
Description
512Mb B-die DDR2 SDRAM
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
Differential input AC logic Level
Notes:
1. V
and V
2. The typical value of V
V
Differential AC output parameters
Note :
1. The typical value of V
V
512Mb B-die DDR2 SDRAM
IX
OX
(AC) indicates the voltage at which differential input signals must cross.
ID
(AC) indicates the voltage at which differential output signals must cross.
Symbol
Symbol
V
V
V
(AC) specifies the input differential voltage |V
CP
OX
ID(AC)
IX(AC)
(AC)
is the complementary input signal (such as CK, DQS, LDQS or UDQS). The minimum value is equal to V
AC differential cross point voltage
IX
OX
(AC) is expected to be about 0.5 * VDDQ of the transmitting device and V
(AC) is expected to be about 0.5 * VDDQ of the transmitting device and V
AC differential cross point voltage
AC differential input voltage
V
V
CP
TR
Parameter
Parameter
TR
-V
< Differential signal levels >
CP
| required for switching, where V
Page 13 of 28
V
V
DDQ
SSQ
V
ID
0.5 * VDDQ - 0.175
0.5 * VDDQ - 0.125
Min.
Min.
0.5
TR
is the true input signal (such as CK, DQS, LDQS or UDQS)
V
IX or
IX
OX
Crossing point
(AC) is expected to track variations in VDDQ .
V
(AC) is expected to track variations in VDDQ .
0.5 * VDDQ + 0.175
OX
0.5 * VDDQ + 0.125
V
DDQ
Max.
Max.
IH
+ 0.6
(AC) - V
DDR2 SDRAM
Rev. 1.5 July 2005
IL
(AC).
Units
Units
V
V
V
Notes
Note
1
2
1

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