EDD2508AKTA-5B ELPIDA [Elpida Memory], EDD2508AKTA-5B Datasheet - Page 35

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EDD2508AKTA-5B

Manufacturer Part Number
EDD2508AKTA-5B
Description
256M bits DDR SDRAM (32M words x 8 bits, DDR400)
Manufacturer
ELPIDA [Elpida Memory]
Datasheet

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A Read command to the consecutive Precharge command interval (same bank): To output all data
To complete a burst read operation and get a burst length of data, the consecutive precharge command must be
issued tRPD (= BL/ 2 cycles) after the read command is issued.
READ to PRECHARGE Command Interval (same bank): To stop output data
A burst data output can be interrupted with a precharge command. All DQ pins and DQS pins become High-Z tHZP
(= CL) after the precharge command.
Preliminary Data Sheet E0349E60 (Ver. 6.0)
Command
Command
DQS
READ to PRECHARGE Command Interval (same bank): To stop output data (CL = 3, BL = 2, 4, 8)
/CK
DQ
DQS
CK
/CK
DQ
CK
READ to PRECHARGE Command Interval (same bank): To output all data (CL = 3, BL = 4)
NOP
t0
t0
NOP
READ
t1
t1
tRPD = BL/2
NOP
READ
t2
t2
PRE/PALL
PRE/
PALL
t3
t3
CL = 3
35
t4
t4
out0 out1 out2 out3
tHZP
t5
t5
out0 out1
t6
NOP
t6
NOP
t7
t7
EDD2508AKTA-5
High-Z
High-Z
t8
t8

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