KM6164002 Samsung semiconductor, KM6164002 Datasheet - Page 4
KM6164002
Manufacturer Part Number
KM6164002
Description
CMOS SRAM
Manufacturer
Samsung semiconductor
Datasheet
1.KM6164002.pdf
(9 pages)
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TIMING WAVE FORM OF WRITE CYCLE(1)
ADD
OE
CS
UB, LB
WE
Data In
Data Out
NOTES(READ CYCLE)
1. WE is high for read cycle.
2. All read cycle timing is referenced from the last valid address to the first transition address.
3. t
4. At any given temperature and voltage condition, t
5. Transition is measured 200
6. Device is continuously selected with CS=V
7. Address valid prior to coincident with CS transition low.
8. For common I/O applications, minimization or elimination of bus contention conditions is necessary during read and write cycl e.
KM6164002, KM6164002E, KM6164002I
TIMING WAVE FORM OF READ CYCLE(2)
ADD
CS
UB, LB
OE
Data Out
HZ
and t
OHZ
are defined as the time at which the outputs achieve the open circuit condition and are not referenced to V
§Æ
High-Z
from steady state voltage with Load(B). This parameter is sampled and not 100% tested.
IL.
t
AS(4)
HZ
(Max.) is less than t
(WE=V
(OE=Clock)
t
OHZ(6)
IH
t
t
BLZ(4,5)
LZ(4,5)
)
t
OLZ
t
t
LZ
AW
CO
- 6 -
t
t
BA
AA
(Min.) both for a given device and from device to device.
t
t
WC
OE
t
CW(3)
t
BW
High-Z(8)
t
WP(2)
t
RC
t
DW
Data Valid
Data Valid
t
WR(5)
t
DH
OH
PRELIMINARY
or V
CMOS SRAM
OL
Levels.
June -1997
t
t
t
BHZ(3,4,5)
t
OH
OHZ
HZ(3,4,5)
Rev 2.0