HY5DU561622CT-D HYNIX [Hynix Semiconductor], HY5DU561622CT-D Datasheet - Page 13

• Manufacturer Part Number: HY5DU561622CT-D
• Description: 256M-P DDR SDRAM
• Manufacturer: HYNIX [Hynix Semiconductor]

OPERATION COMMAND TRUTH TABLE-IV
Note :
1. H - Logic High Level, L - Logic Low Level, X - Don’t Care, V - Valid Data Input,
2. All entries assume that CKE was active(high level) during the preceding clock cycle.
3. If both banks are idle and CKE is inactive(low level), then in power down mode.
4. Illegal to bank in specified state. Function may be legal in the bank indicated by Bank Address(BA) depending on the state of
5. If both banks are idle and CKE is inactive(low level), then self refresh mode.
6. Illegal if tRCD is not met.
7. Illegal if tRAS is not met.
8. Must satisfy bus contention, bus turn around, and/or write recovery requirements.
9. Illegal if tRRD is not met.
10. Illegal for single bank, but legal for other banks in multi-bank devices.
11. Illegal for all banks.
Rev. 0.3 / Oct. 2003
BA - Bank Address, AP - AutoPrecharge Address, CA - Column Address, RA - Row Address, NOP - NO Operation.
that bank.
ACCESSING
REGISTER
Current
WRITE
State
MODE
/CS
H
L
L
L
L
L
L
L
L
L
L
L
L
L
/RAS
H
H
H
H
H
L
L
L
L
X
L
L
L
L
/CAS
H
H
H
H
H
H
L
L
L
X
L
L
L
L
/WE
H
H
H
H
H
H
X
L
L
L
L
L
L
L
BA, CA, AP
BA, CA, AP
BA, CA, AP
Address
OPCODE
OPCODE
BA, RA
BA, RA
BA, AP
BA, AP
X
X
X
X
X
WRITE/WRITEAP
WRITE/WRITEAP
READ/READAP
Command
AREF/SREF
AREF/SREF
PRE/PALL
PRE/PALL
DSEL
MRS
NOP
MRS
ACT
BST
ACT
HY5DU561622CT-D4/D43
HY5DU56422CT-D4/D43
HY5DU56822CT-D4/D43
NOP - Enter IDLE after tMRD
NOP - Enter IDLE after tMRD
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
Action
11
11
11
11
11
11
11
11
11
11
11
11
13