V53C8126 Mosel Vitelic Corp, V53C8126 Datasheet

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V53C8126

Manufacturer Part Number
V53C8126
Description
ULTRA-HIGH PERFORMANCE/ 128K X 8 BIT FAST PAGE MODE CMOS DYNAMIC RAM
Manufacturer
Mosel Vitelic Corp
Datasheet
MOSEL VITELIC
Features
Device Usage Chart
V53C8126H Rev. 1.1 July 1997
HIGH PERFORMANCE
Max. RAS Access Time, (t
Max. Column Address Access Time, (t
Min. Fast Page Mode Cycle Time, (t
Min. Read/Write Cycle Time, (t
128K x 8-bit organization
RAS access time: 35, 40, 45, 50 ns
Fast Page Mode supports sustained I/O data
rates up to 40 MHz
Read-Modify-Write, RAS-Only Refresh,
CAS-Before-RAS Refresh capability
Refresh Interval
Available in 26/24 pin 300 mil SOJ and 28 pin
TSOP package
• V53C8126H – 512 cycles/8 ms
Temperature
0 C to 70 C
Operating
Range
RAC
Package Outline
K
)
RC
)
V53C8126H
ULTRA-HIGH PERFORMANCE,
128K X 8 BIT FAST PAGE MODE
CMOS DYNAMIC RAM
PC
CAA
)
T
)
35
Access Time (ns)
40
1
Description
CMOS dynamic random access memory. The
V53C8126H offers a combination of features: Fast
Page Mode for high data bandwidth, fast usable
speed, CMOS standby current.
and output capacitances are significantly lowered to
allow increased system performance. Fast Page
Mode operation allows random access of up to 256
columns (x8) bits within a row with cycle times as
short as 21 ns. Because of static circuitry, the CAS
clock is not in the critical timing path. The flow-
through column address latches allow address
pipelining while relaxing many critical system timing
requirements for fast usable speed. These features
make the V53C8126H ideally suited for graphics,
digital signal processing and high performance
peripherals.
35 ns
18 ns
21 ns
70 ns
The V53C8126H is a high speed 131,072 x 8 bit
All inputs and outputs are TTL compatible. Input
35
45
50
40 ns
20 ns
23 ns
75 ns
40
Power
Std.
45 ns
22 ns
25 ns
80 ns
45
PRELIMINARY
Temperature
V53C8126H
Blank
Mark
50 ns
24 ns
28 ns
90 ns
50

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V53C8126 Summary of contents

Page 1

... Description The V53C8126H is a high speed 131,072 x 8 bit CMOS dynamic random access memory. The V53C8126H offers a combination of features: Fast Page Mode for high data bandwidth, fast usable speed, CMOS standby current. All inputs and outputs are TTL compatible. Input and output capacitances are significantly lowered to allow increased system performance ...

Page 2

... 8126H 02 Pin Names A –A 0 RAS CAS WE OE I/O –I V53C8126H Rev. 1.1 July 1997 FAMILY DEVICE K (SOJ) T (TSOP) PIN CONFIGURATION CAS 1 I/ I/ VSS 6 6 VSS ...

Page 3

... CAS RAS RAS CLOCK GENERATOR REFRESH COUNTER • • • V53C8126H Rev. 1.1 July 1997 Capacitance Symbol C Address Input IN1 RAS, CAS, WE IN2 C Data Input/Output OUT * Note: Capacitance is sampled and not 100% tested ...

Page 4

... Standby, Output Enabled I V Supply Current, CC6 CC CMOS Standby V Input Low Voltage IL V Input High Voltage IH V Output Low Voltage OL V Output High Voltage OH V53C8126H Rev. 1.1 July 1997 = 0 V, unless otherwise specified. SS V53C8126H Min. Typ. –10 – – ...

Page 5

... Delay Time RAS or CAS Hold Time CL1RH1(W) RSH (W) in Write Cycle Write Command to CAS WL1CH1 CWL Lead Time V53C8126H Rev. 1.1 July 1997 = 0V unless otherwise noted 35 40 Min. Max. Min. Max. Min. Max. Min. Max. Unit 35 75K 40 75K ...

Page 6

... RH2CL2 RPC CAS Hold Time RL1CH1 CHR CAS-before-RAS Refresh Fast Page Mode Read- CL2CL2 PCM (RMW) Modify-Write Cycle Time V53C8126H Rev. 1.1 July 1997 Min. Max. Min. Max. Min. Max. Min. Max. Unit ...

Page 7

... MOSEL VITELIC AC Characteristics (Cont'd) JEDEC # Symbol Symbol Parameter t t Transition Time (Rise and Fall Refresh Interval REF (512 Cycles) V53C8126H Rev. 1.1 July 1997 Min. Max. Min. Max. Min. Max. Min. Max. Unit V53C8126H ...

Page 8

... Assumes a three-state test load (5 pF and a 380 Ohm Thevenin equivalent). 17. An initial 200 s pause and 8 RAS-containing cycles are required when exiting an extended period of bias without clocks. An extended period of time without clocks is defined as one that exceeds the specified Refresh Interval. V53C8126H Rev. 1.1 July 1997 (max.) is measured with a maximum of two CC (min.) may undershoot to – ...

Page 9

... IH CAS ASR ( ADDRESS ROW ADDRESS I V53C8126H Rev. 1.1 July 1997 t RC (2) t RAS ( (23) t CSH ( RCD (6) RSH (R)(12) t CAS (5) t RAD (24 RAH (9) CAH (11) t ASC (10) COLUMN ADDRESS t CAR (44) t RCS (7) ...

Page 10

... V IH ROW ADDRESS ADDRESS RAD (24 I V53C8126H Rev. 1.1 July 1997 t RC (2) t RAS ( (23) t CSH ( RCD (6) RSH (W)(12) t CAS ( RAD (24) CAR (44 CAH (11) RAH (9) t ASC (10) COLUMN ADDRESS t CWL (26) ...

Page 11

... ADD RAD (24) t WCS (27 (32 VALID I/O DATA V53C8126H Rev. 1.1 July 1997 t RAS ( (23) t RCD (6) PC (42 (43 CAS (5) CAS (5) t CSH (4) t RAH (9) COLUMN COLUMN ADDRESS ADDRESS t RCH (14 CAH (11) ...

Page 12

... Waveforms of RAS-Only Refresh Cycle V IH RAS CRP (13 CAS ASR ( ADDRESS V IL NOTE: WE Don’t care V53C8126H Rev. 1.1 July 1997 t RAS (1) t CSH (4) t PCM (50 (43 CAS (5) CAS ( ASC (10) ASC (10 CAH (11) CAH (11) COLUMN ...

Page 13

... IL RPC (48 (43 CAS (22 I WE, OE, A –A = Don’t care NOTE V53C8126H Rev. 1.1 July 1997 t RAS ( CHR (49) CP (43) t CAS (5) t RCS ( (21 WCS (27) WCH (28 (33) DS (32) ...

Page 14

... V IH ROW ADDRESS ADD WCS (27 (32 I V53C8126H Rev. 1.1 July 1997 RAS ( (23 RSH (R)(12) CHR (49) t RAD (24) t ASC (10) t CAH (11) COLUMN ADDRESS t RRH (15) t CAA (20) t OAC (17) ...

Page 15

... Using a CAS-before-RAS Refresh Cycle. If CAS makes a transition from low to high to low after the previous cycle and before RAS falls, CAS- before-RAS refresh are all satisifed. V53C8126H uses the output of an internal 9-bit counter as the source of row addresses and ignore external address inputs. when CAA CAS-before-RAS is a “ ...

Page 16

... RAS clock). Eight initialization cycles are required after extended periods of bias without clocks (greater than the Refresh Interval). During Power-On, the the V53C8126H is dependent on the input levels of CAA CAP RAS and CAS. If RAS is low during Power-On, the device will go into an active cycle and I current transients ...

Page 17

... See Detail “A” D .007 .011 .007 .009 With Plating .004 Base Metal .006 Section “D-D” V53C8126H Rev. 1.1 July 1997 0.665/0.698 0.125/0.135 0.018 Typ. 0.025 Min. 0.05 Typ. Detail “A” 0.10 (.004) .047 .002 .006 0.10 .311 .319 See Detail “ ...

Page 18

... MOSEL-VITELIC. 3910 N. First Street, San Jose, CA 95134-1501 Ph: (408) 433-6000 Fax: (408) 433-0952 Tlx: 371-9461 MOSEL VITELIC V53C8126H Rev. 1.1 July 1997 JAPAN RM.302 ANNEX-G HIGASHI-NAKANO NAKANO-KU, TOKYO 164 ...

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