SSTUB32872AHMLF IDT, Integrated Device Technology Inc, SSTUB32872AHMLF Datasheet - Page 12

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SSTUB32872AHMLF

Manufacturer Part Number
SSTUB32872AHMLF
Description
IC REGIST BUFF 28BIT DDR2 96-BGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of SSTUB32872AHMLF

Logic Type
Registered Buffer for DDR2
Supply Voltage
1.7 V ~ 1.9 V
Number Of Bits
28
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
96-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1222F—3/13/07
(over recommended operating free-air temperature range, unless otherwise noted)
Notes:
(over recommended operating free-air temperature range, unless otherwise noted)
1. Guaranteed by design, not 100% tested in production.
Timing Requirements
SYMBOL
Switching Characteristics
Symbol
t
t
fmax
PDMSS
f
t
INACT
t
t
t
clock
PDM
t
t
PHL
PLH
t
ACT
t
t
LH
HL
W
S
H
Max input clock frequency
Propagation delay, single
bit switching
Low to High propagation
delay
High to low propagation
delay
Propagation delay
simultaneous switching
High to low propagation
delay
Low to High propagation
delay
Clock frequency
Pulse duration
Differential inputs active time
Differential inputs inactive time
Setup time
Hold time
Hold time
1 - Guaranteed by design, not 100% tested in production.
2 - For data signal input slew rate of 1V/ns.
3 - For data signal input slew rate of 0.5V/ns and < 1V/ns.
4 - CK/ CK signal input slew rate of 1V/ns.
Parameter
PARAMETERS
CK↑ and CK ↓ to Qn
CK↑ and CK ↓ to PTYERR
CK↑ and CK ↓ to Qn
RESET ↓ to Qn↓
RESE T↓ to PTYERR ↑
Measurement Conditions
Data before CK↑, CK ↓
DCS0 , DSC1 before CK↑,
CK ↓, CSR high
DCS , DODT, DCKE and Dn
after CK↑, CK ↓
PAR_IN after CK↑, CK ↓
12
1.25
MIN
410
1.2
0.9
V
DD
MIN
0.6
0.7
0.6
0.5
1
= 1.8V ±0.1V
ICSSSTUB32872A
MAX
Advance Information
1.9
3
3
2
3
3
MAX
410
10
15
Units
MHz
ns
ns
ns
ns
ns
ns
UNITS
MHz
ns
ns
ns
ns
ns
ns

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