SSTUB32872AHMLF IDT, Integrated Device Technology Inc, SSTUB32872AHMLF Datasheet - Page 13

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SSTUB32872AHMLF

Manufacturer Part Number
SSTUB32872AHMLF
Description
IC REGIST BUFF 28BIT DDR2 96-BGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of SSTUB32872AHMLF

Logic Type
Registered Buffer for DDR2
Supply Voltage
1.7 V ~ 1.9 V
Number Of Bits
28
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
96-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Notes: 1. C
1222F—3/13/07
2. I
3. All input pulses are supplied by generators having the following chareacteristics: PRR ≤10 MHz,
4. The outputs are measured one at a time with one transition per measurement.
5. V
6. V
7. V
8. V
9. t
VCMOS
Zo=50Ω, input slew rate = 1 V/ns ±20% (unless otherwise specified).
PLH
DD
Note 2)
REF
ID
IH
IL
L
Inp ut
Inpu t
Inpu t
(see
RST
VOLTAGE WAVEFORMS – SETUP AND HOLD TIMES
I
incluces probe and jig capacitance.
= V
tested with clock and data inputs held at V
DD
CK
CK
= V
= 600 mV
t
and t
in act
= V
VOLTAGE WAVEFORMS – PULSE DURATION
REF
VOLTAGE AND CURRENT WAVEFORMS
REF
INPUTS ACTIVE AND INACTIVE TIMES
DD
PHL
/2
- 250 mV (ac voltage levels) for differential inputs. V
+ 250 mV (ac voltage levels) for differential inputs. V
Figure 6
10%
CK Inputs
V
are the same as t
DD
/2
V
V
ICR
REF
t
su
R
t
Test Point
Test Point
L
w
Parameter Measurement Information (V
= 100Ω
V
ICR
t
h
TL=50Ω
PDM
V
V
V
DD
ICR
REF
.
/2
90%
t
CK
CK
act
V
V
V
DUT
0 V
V
V
ID
ID
LOAD CIRCUIT
DD
IH
IL
Out
DD
13
LVCMOS
TL=350ps, 50Ω
or GND, and Io = 0mA.
Output
VOLTAGE WAVEFORMS – PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS – PROPAGATION DELAY TIMES
Output
Input
RST
CK
CK
t
PLH
C
(see Note 1)
L
= 30 pF
V
IL
ICR
IH
DD
= GND for LVCMOS input.
V
= V
TT
= 1.8V 0.1V)
DD
V
DD
ICSSSTUB32872A
V
Advance Information
/2
for LVCMOS input.
DD
±
R
R
Test Point
L
L
= 1000Ω
= 1000Ω
V
V
TT
ICR
t
RPHL
V
TT
t
PHL
V
V
V
V
V
V
V
ID
IH
IL
OH
OL
OH
OL

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