MAX1261ACEI Maxim Integrated, MAX1261ACEI Datasheet - Page 15

• Manufacturer Part Number: MAX1261ACEI
• Description: Analog to Digital Converters - ADC
• Manufacturer: Maxim Integrated

Specifications of MAX1261ACEI

• Number Of Channels: 8/4
• Architecture: SAR
• Conversion Rate: 250 KSPs
• Resolution: 12 bit
• Input Type: Single-Ended/Pseudo-Differential
• Snr: 70 dB
• Interface Type: Parallel
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Package / Case: QSOP-28
• Maximum Power Dissipation: 667 mW
• Minimum Operating Temperature: 0 C
• Number Of Converters: 1
• Voltage Reference: 2.5 V

When power is first applied, internal power-on reset cir-
cuitry activates the MAX1261/MAX1263 in external
clock mode and sets INT high. After the power supplies
stabilize, the internal reset time is 10µs, and no conver-
sions should be attempted during this phase. When
using the internal reference, 500µs is required for V
to stabilize.
The MAX1261/MAX1263 can be used with an internal
or external reference voltage. An external reference
can be connected directly to REF or REFADJ.
An internal buffer is designed to provide +2.5V at REF for
both the MAX1261 and the MAX1263. The internally
trimmed +1.22V reference is buffered with a +2.05V/V
gain.
Table 4. Channel Selection for Pseudo-Differential Operation (SGL/DIF = 0)
*Channels CH4–CH7 apply to MAX1261 only.
Table 5. Data-Bus Output (8 + 4 Parallel
Interface)
PIN
D0
D1
D2
D3
D4
D5
D6
D7
A2
0
0
0
0
1
1
1
1
BIT 0 (LSB)
HBEN = 0
BIT 1
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
with +2.5V Reference and Parallel Interface
Internal and External Reference
A1
0
0
1
1
0
0
1
1
Applications Information
______________________________________________________________________________________
250ksps, +3V, 8-/4-Channel, 12-Bit ADCs
(UNI/BIP = 0)
BIPOLAR
BIT 11
BIT 11
BIT 11
BIT 11
A0
0
1
0
1
0
1
0
1
BIT 11 (MSB)
HBEN = 1
BIT 10
BIT 8
BIT 9
Power-On Reset
CH0
+
-
(UNI/BIP = 1)
UNIPOLAR
CH1
0
0
0
0
+
-
REF
CH2
+
-
With the internal reference, the full-scale range is +2.5V
with unipolar inputs and ±1.25V with bipolar inputs. The
internal reference buffer allows for small adjustments
(±100mV) in the reference voltage (Figure 7).
Note that the reference buffer must be compensated
with an external capacitor (4.7µF min) connected
between REF and GND to reduce reference noise and
switching spikes from the ADC. To further minimize
noise on the reference, connect a 0.01µF capacitor
between REFADJ and GND.
With both the MAX1261 and MAX1263, an external ref-
erence can be placed at either the input (REFADJ) or
the output (REF) of the internal reference buffer amplifier.
Using the REFADJ input makes buffering the external
reference unnecessary. The REFADJ input impedance
is typically 17kΩ.
Figure 7. Reference Voltage Adjustment with External
Potentiometer
50kΩ
50kΩ
CH3
+
+3V
-
GND
CH4*
330kΩ
+
-
0.01µF
GND
CH5*
+
-
4.7µF
External Reference
Internal Reference
CH6*
+
-
REFADJ
REF
MAX1261
MAX1263
CH7*
+
-
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