MAX1261ACEI Maxim Integrated, MAX1261ACEI Datasheet - Page 5

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MAX1261ACEI

Manufacturer Part Number
MAX1261ACEI
Description
Analog to Digital Converters - ADC
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX1261ACEI

Number Of Channels
8/4
Architecture
SAR
Conversion Rate
250 KSPs
Resolution
12 bit
Input Type
Single-Ended/Pseudo-Differential
Snr
70 dB
Interface Type
Parallel
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Package / Case
QSOP-28
Maximum Power Dissipation
667 mW
Minimum Operating Temperature
0 C
Number Of Converters
1
Voltage Reference
2.5 V
TIMING CHARACTERISTICS (continued)
(V
cycle); T
Figure 1. Load Circuits for Enable/Disable Times
Note 1: Tested at V
Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after offset and gain errors have
Note 3: Offset nulled.
Note 4: On channel is grounded; sine wave applied to off channels.
Note 5: Conversion time is defined as the number of clock cycles times the clock period; clock has 50% duty cycle.
Note 6: Input voltage range referenced to negative input. The absolute range for the analog inputs is from GND to V
Note 7: External load should not change during conversion for specified accuracy.
Note 8: When bit 5 is set low for internal acquisition, WR must not return low until after the first falling clock edge of the conversion.
RD Rise to Output Disable
RD Fall to Output Data Valid
HBEN to Output Data Valid
RD Fall to INT High Delay
CS Fall to Output Data Valid
DD
a) HIGH-Z TO V
DOUT
= V
A
LOGIC
3kΩ
been removed.
PARAMETER
= T
MIN
OH
with +2.5V Reference and Parallel Interface
= +2.7V to +3.6V, COM = GND, REFADJ = V
AND V
to T
OL
DD
_______________________________________________________________________________________
MAX
TO V
250ksps, +3V, 8-/4-Channel, 12-Bit ADCs
= +3V, COM = GND, unipolar single-ended input mode.
C
20pF
, unless otherwise noted. Typical values are at T
OH
LOAD
b) HIGH-Z TO V
SYMBOL
t
t
t
DOUT
t
INT1
DO1
DO2
t
DO
TR
OL
V
C
C
C
C
C
LOGIC
AND V
LOAD
LOAD
LOAD
LOAD
LOAD
3kΩ
C
20pF
LOAD
OH
= 20pF, Figure 1
= 20pF, Figure 1
= 20pF, Figure 1
= 20pF, Figure 1
= 20pF, Figure 1
TO V
OL
DD
CONDITIONS
, V
REF
= +2.5V, 4.7µF capacitor at REF pin, f
A
= +25°C.)
MIN
20
20
20
TYP
CLK
= 4.8MHz (50% duty
MAX
110
100
110
DD
70
70
.
UNITS
ns
ns
ns
ns
ns
5

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