MAX1281BEUP-T Maxim Integrated, MAX1281BEUP-T Datasheet - Page 17

• Manufacturer Part Number: MAX1281BEUP-T
• Description: Analog to Digital Converters - ADC
• Manufacturer: Maxim Integrated

Specifications of MAX1281BEUP-T

• Number Of Channels: 8/4
• Architecture: SAR
• Conversion Rate: 300 KSPs
• Resolution: 12 bit
• Input Type: Single-Ended/Pseudo-Differential
• Snr: 70 dB
• Interface Type: 4-Wire (SPI, Microwire, QSPI, TMS320)
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TSSOP-20
• Maximum Power Dissipation: 559 mW
• Minimum Operating Temperature: - 40 C
• Number Of Converters: 1
• Voltage Reference: 2.5 V

Table 4 details the four power modes with the corre-
sponding supply current and operating sections. For
data rates achievable in software power-down modes,
see Power-Down Sequencing section.
Pulling SHDN low places the converter in hardware
power-down. Unlike software power-down mode, the
conversion is terminated immediately. When returning
to normal operation from SHDN with an external refer-
ence, the MAX1280/MAX1281 can be considered fully
powered-up within 2µs of actively pulling SHDN high.
When using the internal reference, the conversion
should be initiated only after the reference has settled;
its recovery time depends on the external bypass
capacitors and shutdown duration.
The MAX1280/MAX1281’s automatic power-down
modes can save considerable power when operating at
Figure 9. Reference Power-Up Delay vs. Time in Shutdown
Figure 10a. Average Supply Current vs. Sample Rate (Using
FULLPD and Internal Reference)
400ksps/300ksps, Single-Supply, Low-Power, 8-Channel,
1000
100
1.50
1.25
1.00
0.75
0.50
0.25
10
1
0
0.0001
0.1
MAX1281
V
C
CODE = 101010000000
DD1 =
LOAD
8 CHANNELS
______________________________________________________________________________________
0.001
= 20pF
V
1
DD2 =
SAMPLING RATE (sps)
TIME IN SHUTDOWN (s)
Power-Down Sequencing
3.0V
10
0.01
1 CHANNEL
Serial 12-Bit ADCs with Internal Reference
100
Hardware Power-Down
0.1
1k
1
10k
10
less than maximum sample rates. Figures 10 and 11
show the average supply current as a function of the
sampling rate.
Full power-down mode (FULLPD) achieves the lowest
power consumption at up to 1000 conversions per
channel per second. Figure 10a shows the MAX1281’s
power consumption for 1- or 8-channel conversions
using full power-down mode (PD1 = PD0 = 0), with the
internal reference and the maximum clock speed. A
0.01µF bypass capacitor plus the internal 17kΩ refer-
ence resistor at REFADJ forms an RC filter with a 200µs
time constant. To achieve full 12-bit accuracy, 10 time
constants or 2ms are required after power-up if the
bypass capacitor is fully discharged between conver-
sions. Waiting this 2ms in FASTPD mode or reduced-
power mode (REDP) instead of full power-down mode
can further reduce power consumption. This is
achieved by using the sequence shown in Figure 12a.
Figure 10b shows the MAX1281’s power consumption
for 1- or 8-channel conversions using FULLPD mode
(PD1 = PD0 = 0), an external reference, and the maxi-
mum clock speed. One dummy conversion to power-up
the device is needed, but no wait-time is necessary to
start the second conversion, thereby achieving lower
power consumption at up to the full sampling rate.
FASTPD and REDP modes achieve the lowest power
consumption at speeds close to the maximum sample
rate. Figure 11 shows the MAX1281’s power consump-
tion in FASTPD mode (PD1 = 0, PD0 = 1), REDP mode
(PD1 = 1, PD0 = 0), and (for comparison) normal
operating mode (PD1 = 1, PD0 = 1). The figure shows
Figure 10b. Average Supply Current vs. Sampling Rate (Using
FULLPD and External Reference)
10,000
1000
100
10
1
1
MAX1281
V
C
CODE = 101010000000
DD1
LOAD
= V
= 20pF
10
DD2
SAMPLING RATE (sps)
= 3.0V
Using Full Power-Down Mode
Using Fast Power-Down and
8 CHANNELS
100
Reduced-Power Modes
1k
1 CHANNEL
10k
100k
17