MAX1281BEUP-T Maxim Integrated, MAX1281BEUP-T Datasheet - Page 7

• Manufacturer Part Number: MAX1281BEUP-T
• Description: Analog to Digital Converters - ADC
• Manufacturer: Maxim Integrated

Specifications of MAX1281BEUP-T

• Number Of Channels: 8/4
• Architecture: SAR
• Conversion Rate: 300 KSPs
• Resolution: 12 bit
• Input Type: Single-Ended/Pseudo-Differential
• Snr: 70 dB
• Interface Type: 4-Wire (SPI, Microwire, QSPI, TMS320)
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TSSOP-20
• Maximum Power Dissipation: 559 mW
• Minimum Operating Temperature: - 40 C
• Number Of Converters: 1
• Voltage Reference: 2.5 V

TIMING CHARACTERISTICS—MAX1281
(Figures 1, 2, 6, 7; V
Note 1: MAX1280 tested at V
Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the gain error and offset
Note 3: Offset nulled.
Note 4: Ground “on” channel; sine wave applied to all “off” channels.
Note 5: Conversion time is defined as the number of clock cycles multiplied by the clock period; clock has 50% duty cycle.
Note 6: The absolute voltage range for the analog inputs (CH7–CH0, and COM) is from GND to V
Note 7: External load should not change during conversion for specified accuracy. Guaranteed specification of 2mV/mA is a result
Note 8: ADC performance is limited by the converter’s noise floor, typically 300µVp-p.
Note 9: Electrical characteristics are guaranteed from V
Note 10: A
Note 11:
400ksps/300ksps, Single-Supply, Low-Power, 8-Channel,
SCLK Period
SCLK Pulse Width High
SCLK Pulse Width Low
DIN to SCLK Setup
DIN to SCLK Hold
CS Fall to SCLK Rise Setup
SCLK Rise to CS Rise Hold
SCLK Rise to CS Fall ignore
CS Rise to SCLK Rise Ignore
SCLK Rise to DOUT Hold
SCLK Rise to SSTRB Hold
SCLK Rise to DOUT Valid
SCLK Rise to SSTRB Valid
CS Rise to DOUT Disable
CS Rise to SSTRB Disable
CS Fall to DOUT Enable
CS Fall to SSTRB Enable
CS Pulse Width High
input mode.
error have been nulled.
of production test limitations.
this range, see the Typical Operating Characteristics. For guaranteed specifications beyond the limits, contact the factory.
MAX1281 tested with same loads, f
PARAMETER
IN
= midscale. Unipolar mode
PD1
0
0
1
1
DD1
_______________________________________________________________________________________
= V
DD2
DD1
PD0
Serial 12-Bit ADCs with Internal Reference
= +2.7V to +3.6V; T
0
1
0
1
SYMBOL
= V
t
t
t
t
t
t
t
t
t
t
t
t
t
DOH
DOD
CSW
t
t
t
t
CSH
CSO
DOV
DOE
t
CSS
CS1
STH
STD
STV
STE
DD2
CP
CH
DS
DH
CL
.
Full power-down.
Fast power-down.
Reduced power mode.
Normal operation (operating mode).
MAX1280 tested with 20pF on DOUT, 20pF on SSTRB, and f
= +5V, MAX1281 tested at V
SCLK
C
C
C
C
C
C
C
C
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
= 4.8MHz, 0 to 3V. DOUT = FFF hex.
A
= T
= 20pF
= 20pF
= 20pF
= 20pF
= 20pF
= 20pF
= 20pF
= 20pF
MIN
MODE
DD1(MIN)
to T
CONDITIONS
MAX
= V
; unless otherwise noted.)
DD2(MIN)
DD1
= V
to V
DD2
DD1(MAX)
= +3V; COM = GND; unipolar single-ended
= V
DD2(MAX)
MIN
208
100
83
83
45
45
45
45
13
13
13
DD1
0
0
1
SCLK
.
. For operations beyond
TYP
20
20
= 6.4MHz, 0 to 5V.
MAX
100
100
85
85
85
85
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
7