S9S12G48F1CLC Freescale Semiconductor, S9S12G48F1CLC Datasheet - Page 794

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S9S12G48F1CLC

Manufacturer Part Number
S9S12G48F1CLC
Description
16-bit Microcontrollers - MCU S12Core,48k Flash,Au
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S12G48F1CLC

Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
48 KB
Data Ram Size
2 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-32
Mounting Style
SMD/SMT

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16 KByte Flash Module (S12FTMRG16K1V1)
Trying to alter data in any protected area in the P-Flash memory will result in a protection violation error
and the FPVIOL bit will be set in the FSTAT register. The block erase of a P-Flash block is not possible if
any of the P-Flash sectors contained in the same P-Flash block are protected.
Although the protection scheme is loaded from the Flash memory at global address 0x3_FF0C during the
reset sequence, it can be changed by the user. The P-Flash protection scheme can be used by applications
requiring reprogramming in single chip mode while providing as much protection as possible if
reprogramming is not required.
796
FPHS[1:0]
FPOPEN
RNV[2:0]
FPHDIS
RNV[6]
Field
4–3
2–0
7
6
5
Flash Protection Operation Enable — The FPOPEN bit determines the protection function for program or
erase operations as shown in
0 When FPOPEN is clear, the FPHDIS bit defines an unprotected address range as specified by the FPHS bits
1 When FPOPEN is set, the FPHDIS bit enables protection for the address range specified by the FPHS bits
Reserved Nonvolatile Bit — The RNV bit should remain in the erased state for future enhancements.
Flash Protection Higher Address Range Disable — The FPHDIS bit determines whether there is a
protected/unprotected area in a specific region of the P-Flash memory ending with global address 0x3_FFFF.
0 Protection/Unprotection enabled
1 Protection/Unprotection disabled
Flash Protection Higher Address Size — The FPHS bits determine the size of the protected/unprotected area
in P-Flash memory as shown
Reserved Nonvolatile Bits — These RNV bits should remain in the erased state.
FPHS[1:0]
1
Table 24-19. P-Flash Protection Higher Address Range
FPOPEN
For range sizes, refer to
00
01
10
11
1
1
0
0
Table 24-18. P-Flash Protection Function
MC9S12G Family Reference Manual,
Table 24-17. FPROT Field Descriptions
FPHDIS
inTable
Table 24-18
1
0
1
0
Global Address Range
0x3_C000–0x3_FFFF
0x3_F800–0x3_FFFF
0x3_F000–0x3_FFFF
0x3_E000–0x3_FFFF
24-19. The FPHS bits can only be written to while the FPHDIS bit is set.
Table
No P-Flash Protection
Protected High Range
Full P-Flash Memory Protected
Unprotected High Range
for the P-Flash block.
24-19.
Description
Function
Rev.1.23
1
Protected Size
16 Kbytes
2 Kbytes
4 Kbytes
8 Kbytes
Freescale Semiconductor

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