S9S12GN16F0CLF Freescale Semiconductor, S9S12GN16F0CLF Datasheet - Page 683

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S9S12GN16F0CLF

Manufacturer Part Number
S9S12GN16F0CLF
Description
16-bit Microcontrollers - MCU 16-bit16k Flash 2k RAM
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S12GN16F0CLF

Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
16 KB
Data Ram Size
1024 B
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
TSSOP-20
Mounting Style
SMD/SMT

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20.4.4
A 13-bit modulus counter in the baud rate generator derives the baud rate for both the receiver and the
transmitter. The value from 0 to 8191 written to the SBR12:SBR0 bits determines the bus clock divisor.
The SBR bits are in the SCI baud rate registers (SCIBDH and SCIBDL). The baud rate clock is
synchronized with the bus clock and drives the receiver. The baud rate clock divided by 16 drives the
transmitter. The receiver has an acquisition rate of 16 samples per bit time.
Baud rate generation is subject to one source of error:
Table 20-16
When IREN = 0 then,
Freescale Semiconductor
Integer division of the bus clock may not give the exact target frequency.
SCI baud rate = SCI bus clock / (16 * SCIBR[12:0])
Baud Rate Generation
lists some examples of achieving target baud rates with a bus clock frequency of 25 MHz.
SBR[12:0]
1302
2604
5208
Bits
163
326
651
41
81
Table 20-16. Baud Rates (Example: Bus Clock = 25 MHz)
MC9S12G Family Reference Manual, Rev.1.23
Clock (Hz)
609,756.1
308,642.0
153,374.2
Receiver
76,687.1
38,402.5
19,201.2
9600.6
4800.0
Transmitter
Clock (Hz)
38,109.8
19,290.1
9585.9
4792.9
2400.2
1200.1
600.0
300.0
Baud Rate
38,400
19,200
Target
9,600
4,800
2,400
1,200
600
300
Serial Communication Interface (S12SCIV5)
Error
(%)
.76
.47
.16
.15
.01
.01
.00
.00
685

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