MK20FN1M0VMD12 Freescale Semiconductor, MK20FN1M0VMD12 Datasheet

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... Freescale Semiconductor Data Sheet: Technical Data K20 Sub-Family Supports the following: MK20FX512VLQ12, MK20FN1M0VLQ12, MK20FX512VMD12, MK20FN1M0VMD12 Features • Operating Characteristics – Voltage range: 1.71 to 3.6 V – Flash write voltage range: 1.71 to 3.6 V – Temperature range (ambient): -40 to 105°C • Performance – 120 MHz ARM Cortex-M4 core with DSP instructions delivering 1 ...

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... USB full-/low-speed On-the-Go controller with on-chip transceiver – Two Controller Area Network (CAN) modules – Three SPI modules – Two I2C modules – Six UART modules – Secure Digital host controller (SDHC) – Two I2S modules K20 Sub-Family Data Sheet, Rev. 4, 10/2012. 2 Freescale Semiconductor, Inc. ...

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... Capacitance attributes........................................20 5.3 Switching specifications.....................................................20 5.3.1 Device clock specifications.................................20 5.3.2 General switching specifications.........................21 5.4 Thermal specifications.......................................................22 5.4.1 Thermal operating requirements.........................22 K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Table of Contents 5.4.2 Thermal attributes...............................................23 5.5 Power sequencing.............................................................24 6 Peripheral operating requirements and behaviors....................24 6.1 Core modules....................................................................24 6.1.1 Debug trace timing specifications.......................24 6.1.2 JTAG electricals ...

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... Dimensions...............................................................................75 7.1 Obtaining package dimensions.........................................75 8 Pinout........................................................................................76 8.1 Pins with active pull control after reset..............................76 K20 Sub-Family Data Sheet, Rev. 4, 10/2012. 4 8.2 K20 Signal Multiplexing and Pin Assignments..................76 8.3 K20 Pinouts.......................................................................82 9 Revision History........................................................................84 Freescale Semiconductor, Inc. ...

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... A Key attribute M Flash memory type FFF Program flash memory size K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. www.freescale.com and perform a part number search for Description • Fully qualified, general market flow • Prequalification • K20 • Cortex-M4 w/ DSP and FPU • ...

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... K20 Sub-Family Data Sheet, Rev. 4, 10/2012. 6 Description • –40 to 105 • – • 144 LQFP ( mm) • 144 MAPBGA ( mm) • 120 MHz • Tape and reel • (Blank) = Trays Min. 0.9 1.1 Values Max. Unit V Freescale Semiconductor, Inc. ...

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... A rating is a minimum or maximum value of a technical characteristic that, if exceeded, may cause permanent chip failure: • Operating ratings apply during operation of the chip. • Handling ratings apply when the chip is not powered. K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Min. Max. 10 130 Min ...

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... Degraded operating range - No permanent failure - No permanent failure - Correct operation - Possible decreased life - Possible incorrect operation Operating (power on) Handling range No permanent failure Handling (power off) Max. Unit V Fatal range Expected permanent failure ∞ Fatal range Expected permanent failure ∞ Freescale Semiconductor, Inc. ...

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... Symbol Description I Digital I/O weak WP pullup/pulldown current 3.8.2 Example 2 This is an example of a chart that shows typical values for various voltage and temperature conditions: K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Min. Typ Terminology and guidelines Max. Unit 130 µA 9 ...

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... Determined according to IPC/JEDEC Standard J-STD-020, Moisture/Reflow Sensitivity Classification for Nonhermetic Solid State Surface Mount Devices. K20 Sub-Family Data Sheet, Rev. 4, 10/2012. 10 1.00 1.05 1.10 V (V) DD Description Value 25 3.3 Min. –55 — 150 °C 105 °C 25 °C –40 °C Unit °C V Max. Unit Notes 150 °C 1 260 °C 2 Freescale Semiconductor, Inc. ...

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... RTC battery supply voltage BAT 1. It applies for all port pins covers digital pins. 3. Analog pins are defined as pins that do not have an associated general purpose I/O port function. K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Min. Max. Unit — 3 — ...

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... Analog supply voltage DDA V – -to-V differential voltage DD DDA DD DDA V – -to-V differential voltage SS SSA SS SSA V RTC battery supply voltage BAT K20 Sub-Family Data Sheet, Rev. 4, 10/2012. 12 Min. 2.0 1.71 –0.1 –0.1 1.71 Table continues on the next page... Max. Unit Notes 3.6 V 3.6 V 0.1 V 0.1 V 3.6 V Freescale Semiconductor, Inc. ...

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... Table 2. LVD and POR operating requirements Symbol Description V Falling VDD POR detect voltage POR V Falling low-voltage detect threshold — high LVDH range (LVDV=01) K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Min. 0.7 × V 0.75 × V — — 0.06 × — -25 — ...

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... -3mA V – 0 -2mA V – 0 -0.6mA V – 0 Table continues on the next page... Max. Unit Notes 1 2.78 V 2.88 V 2.98 V 3.08 V — 1.86 V 1.96 V 2.06 V 2.16 V — mV 1.03 V 1100 μs Max. Unit Notes 1.5 V Max. Unit Notes — V — V — V — V Freescale Semiconductor, Inc. ...

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... After a POR event, amount of time from the point V POR reaches 1. execution of the first instruction across the operating temperature range of the chip. • VLLS1 → RUN • VLLS2 → RUN K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Min. — — = 9mA — 3mA — ...

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... Table continues on the next page... Max. Unit Notes 114 μs 5.0 μs 5 μs 4.8 μs Max. Unit Notes See note 160 mA 162 mA 3 175 mA 177 3 Freescale Semiconductor, Inc. ...

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... Data reflects devices with 128 KB of RAM. For devices with RAM, power consumption is reduced by 2 μA. For devices with RAM, power consumption is reduced by 3 μA. 9. Includes 32kHz oscillator current and RTC operation. K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Min. Typ. Max. ...

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... USB regulator disabled • No GPIOs toggled • Code execution from flash with cache enabled • For the ALLOFF curve, all peripheral clocks are disabled except FTFL Figure 2. Run mode supply current vs. core frequency K20 Sub-Family Data Sheet, Rev. 4, 10/2012. 18 Freescale Semiconductor, Inc. ...

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... ° MHz (crystal OSC K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Frequency Typ. band (MHz) 0.15–50 21 50–150 24 150–500 29 500– ...

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... VLPR mode — — — — — Min. Max. Unit — — — Max. Unit Notes 120 MHz — MHz — MHz 60 MHz 50 MHz 25 MHz 25 MHz 4 MHz 4 MHz 4 MHz 0.5 MHz 4 MHz Freescale Semiconductor, Inc. ...

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... Slew disabled • 1.71 ≤ V ≤ 2.7V DD • 2.7 ≤ V ≤ 3.6V DD • Slew enabled • 1.71 ≤ V ≤ 2.7V DD • 2.7 ≤ V ≤ 3.6V DD K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Min. 1.5 100 16 100 2 — — — — — — — — — — ...

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... Unit — — — — — — — — — — — — Freescale Semiconductor, Inc. Notes 7 — — — — 6 — — — — 7 — — — — ...

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... Determined according to JEDEC Standard JESD51-2, Integrated Circuits Thermal Test Method Environmental Conditions—Natural Convection (Still Air), or EIA/JEDEC Standard JESD51-6, Integrated Circuit Thermal Test Method Environmental Conditions—Forced Convection (Moving Air). K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Min. –40 –40 ...

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... T Clock and data fall time f K20 Sub-Family Data Sheet, Rev. 4, 10/2012. 24 and V can use the same power source. DD DD_INT Table continues on the next page... Min. Max. Unit Frequency dependent MHz 2 — — ns — — Freescale Semiconductor, Inc. ...

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... TCLK rise and fall times J5 Boundary scan input data setup time to TCLK rise J6 Boundary scan input data hold time after TCLK rise K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Ts Th Table continues on the next page... Min. ...

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... Min. Max. Unit 1.71 3.6 V MHz 1/J1 — — — ns 12.5 — ns — — ns 2.4 — ns — — — ns 1.4 — ns — 22.1 ns — 22.1 ns 100 — — ns Freescale Semiconductor, Inc. ...

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... TCLK (input) TCLK Data inputs Data outputs Data outputs Data outputs Figure 7. Boundary scan (JTAG) timing K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Figure 6. Test clock input timing Input data valid ...

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... There are no specifications necessary for the device's system modules. 6.3 Clock modules K20 Sub-Family Data Sheet, Rev. 4, 10/2012. 28 J11 J12 J11 Figure 8. Test Access Port timing J14 Figure 9. TRST timing J9 J10 Input data valid Output data valid Output data valid Freescale Semiconductor, Inc. ...

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... High range (DRS=11) f DCO output Low range (DRS=00) dco_t_DMX32 frequency Mid range (DRS=01) Mid-high range (DRS=10) High range (DRS=11) K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Table 15. MCG specifications Min. — 32.768 31.25 — ± 0.3 — ...

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... Max. Unit Notes ps — — MHz MHz 360 MHz 180 MHz 180 7 — — — — 100 × 1075( pll_ref 9 — ps — — ps — ps Freescale Semiconductor, Inc. ...

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... Feedback resistor — low-frequency, high-gain mode (HGO=1) Feedback resistor — high-frequency, low-power mode (HGO=0) Feedback resistor — high-frequency, high-gain mode (HGO=1) K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. 1.71 — — 500 — ...

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... Table continues on the next page... Typ. Max. Unit Notes — — kΩ 200 — kΩ — — kΩ 0 — kΩ 0.6 — — 0.6 — — Typ. Max. Unit Notes — 40 kHz — 8 MHz — 32 MHz — 60 MHz Freescale Semiconductor, Inc ...

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... When a crystal is being used with the 32 kHz oscillator, the EXTAL32 and XTAL32 pins should only be connected to required oscillator components and must not be connected to any other devices. K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. ...

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... Min. — — Table continues on the next page... Typ. Max. Unit Notes 32.768 — kHz 1000 — ms — BAT Typ. Max. Unit Notes 7.5 18 μs 13 113 ms 104 1808 ms 208 3616 ms Typ. Max. Unit Notes — 0.5 ms — 1.0 ms Freescale Semiconductor, Inc ...

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... KB EEPROM backup eewr8b128k t • 256 KB EEPROM backup eewr8b256k t 16-bit write to erased FlexRAM location eewr16bers execution time K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. — — — — — — — ...

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... Table continues on the next page... Max. Unit Notes 1700 μs 1800 μs 2000 μs 275 μs 1850 μs 2000 μs 2200 μs Max. Unit 7 Max. Unit Notes — years — years — cycles 2 — years — years Freescale Semiconductor, Inc. ...

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... EEPROM – 2 × EEESPLIT × EEESIZE Writes_subsystem = where • Writes_subsystem — minimum number of writes to each FlexRAM location for subsystem (each subsystem can have different endurance) K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min FlexRAM as EEPROM 5 ...

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... FlexRAM • n — EEPROM-backup cycling endurance nvmcycee Figure 10. EEPROM backup writes to FlexRAM 6.4.2 EzPort Switching Specifications Table 24. EzPort switching specifications Num Description Operating voltage K20 Sub-Family Data Sheet, Rev. 4, 10/2012. 38 Table continues on the next page... Min. Max. Unit 1.71 3.6 V Freescale Semiconductor, Inc. ...

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... This section describes the timing parameters of the NFC. In the following table: • the flash clock high time and H • flash clock low time, L K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors EP3 EP2 EP4 EP9 EP8 EP7 EP5 EP6 Figure 11 ...

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... NOTE Table 25. NFC specifications Description Table continues on the next page... = 1 NFC Min. Max. Unit + T – 1 — – 1 — – 1 — — – 1 — — Freescale Semiconductor, Inc. ...

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... Data input setup time IS NFC_CLE NFC_CEn NFC_WE NFC_IOn Figure 12. Command latch cycle timing NFC_ALE NFC_CEn NFC_WE NFC_IOn Figure 13. Address latch cycle timing K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Description tCLS tCLH tCS ...

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... K20 Sub-Family Data Sheet, Rev. 4, 10/2012. 42 tWC tWP tWH tDS tDH data data data tRC tRP tREH tIS data data tRR tRC tRP tREH tIS data data tRR tCH tCH data tCH data Freescale Semiconductor, Inc. ...

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... Data and FB_TA input hold 1. Specification is valid for all FB_AD[31:0], FB_BE/BWEn, FB_CSn, FB_OE, FB_R/W,FB_TBST, FB_TSIZ[1:0], FB_ALE, and FB_TS. 2. Specification is valid for all FB_AD[31:0] and FB_TA. K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Max. Unit 2 ...

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... Peripheral operating requirements and behaviors FB1 FB_CLK FB_A[Y] FB2 FB_D[X] Address FB_RW FB_TS FB_ALE FB_CSn FB_OEn FB_BEn FB_TA FB_TSIZ[1:0] Figure 17. FlexBus read timing diagram K20 Sub-Family Data Sheet, Rev. 4, 10/2012. 44 FB3 FB5 Address FB4 Data AA=1 AA=0 FB4 FB5 AA=1 AA=0 TSIZ Freescale Semiconductor, Inc. ...

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... FB_TA FB_TSIZ[1:0] Figure 18. FlexBus write timing diagram 6.5 Security and integrity modules There are no specifications necessary for the device's security and integrity modules. 6.6 Analog K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors FB3 Address Data AA=1 AA=0 FB4 ...

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... Max. Unit Notes — 3 +100 +100 DDA DDA V V SSA SSA — 31/ VREFH — VREFH — REFH kΩ 3 — 5 kΩ — 18.0 MHz 4 — 12.0 MHz 4 5 — 818.330 Ksps Freescale Semiconductor, Inc. ...

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... ADC electrical characteristics Table 29. 16-bit ADC characteristics (V Symbol Description Conditions I Supply current DDA_ADC K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. 37.037 — = 1.0 MHz unless otherwise stated. Typical values are for ADCK ADC calculator tool ...

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... Notes 3 MHz ADACK f ADACK 6.1 MHz 7.3 MHz 9.5 MHz 4 ±6.8 LSB 5 ±2.1 4 -1.1 to +1.9 LSB 5 -0.3 to 0.5 4 -2.7 to +1.9 LSB 5 -0.7 to +0.5 4 -5.4 LSB V = ADIN V DDA -1 — LSB ±0.5 6 — bits — bits — bits — bits dB 7 — dB — — dB — dB Freescale Semiconductor, Inc. ...

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... Input data is 100 Hz sine wave. ADC conversion clock < 12 MHz. 7. Input data is 1 kHz sine wave. ADC conversion clock < 12 MHz. Figure 20. Typical ENOB vs. ADC_CLK for 16-bit differential mode K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors = ...

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... VREF_OU VREF_OU VREF_OU — SSA V — SSA — 128 — 64 — 32 — 100 1.25 — Table continues on the next page... Max. Unit Notes 3 DDA V V DDA 4 — kΩ IN+ to IN- — — — Ω 5 — µs 6 Freescale Semiconductor, Inc. ...

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... I Input DC current DC_PGA Gain = =0.5V CM Gain =64 =0.1V CM K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 1 Min. Typ. 18.484 — 37.037 — MHz unless otherwise stated. Typical values are for ADCK PGAD Min. ...

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... OFS 0.2 — mV — 10 µ ppm/° ppm/°C 0.07 0.21 %/V V from 1.71 DDA to 3.6V 0.14 0.31 %/V × leakage current (refer to the MCU's voltage and current operating ratings × 0.583 REFPGA 90 — dB 16-bit differential 66 — dB mode, Average=32 Freescale Semiconductor, Inc ...

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... Supply current, High-speed mode (EN=1, PMODE=1) DDHS I Supply current, low-speed mode (EN=1, PMODE=0) DDLS V Analog input voltage AIN V Analog input offset voltage AIO K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. 85 100 105 ...

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... K20 Sub-Family Data Sheet, Rev. 4, 10/2012. 54 Min. 1 — — — — V – 0.5 DD — — — –0.5 –0.3 -0.6V. DD Typ. Max. Unit 5 — — — — mV — — V — 0 200 ns 250 600 ns — 40 μs 7 — μA 3 — 0.5 LSB — 0.3 LSB Freescale Semiconductor, Inc. ...

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... Figure 22. Typical hysteresis vs. Vin level (VDD=3.3V, PMODE=0) K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 1 1.3 1.6 1.9 2.2 Vin level (V) HYSTCTR S etting 2.5 2.8 3.1 55 ...

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... A small load capacitance (47 pF) can improve the bandwidth performance of the DAC K20 Sub-Family Data Sheet, Rev. 4, 10/2012 1.3 1.6 1.9 2.2 Vin level (V) Min. 1.71 1.13 Operating temperature range of the device — — or the voltage output of the VREF module (VREF_OUT) DDA HYSTCTR Setting 2.5 2.8 3.1 Max. Unit Notes 3 °C 100 Freescale Semiconductor, Inc. ...

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... Calculated by a best fit curve from 3.0 V, reference select set for V DDA 0x800, temperature range is across the full range of the device K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. — — — ...

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... Peripheral operating requirements and behaviors Figure 24. Typical INL error vs. digital code K20 Sub-Family Data Sheet, Rev. 4, 10/2012. 58 Freescale Semiconductor, Inc. ...

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... VREF_OUT if the VREF_OUT functionality is being used for either an internal or external L reference. 2. The load capacitance should not exceed +/-25% of the nominal specified C the device. K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Max. Unit 1.71 3 ...

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... Min. Max. Unit 0 50 °C Min. Max. Unit 1.173 1.225 V Freescale Semiconductor, Inc. Unit Notes µ µ Notes Notes ...

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... Standby mode V Regulator output voltage — Input supply Reg33out (VREGIN) < 3.6 V, pass-through mode C External output capacitor OUT ESR External output capacitor equivalent series resistance K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 0.5 0 14.25 0.25 Min. Typ. 2.7 — ...

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... K20 Sub-Family Data Sheet, Rev. 4, 10/2012 Min. Typ. — 290 Min. Typ. — 60 — 50 — 16.67 5 — 1 — — — 1 — Max. Unit Notes — Load Max. Unit — MHz — % — ns — ns — ns 9.5 ns — ns Freescale Semiconductor, Inc. ...

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... DS2 DSPI_SCK output high/low time DS3 DSPI_PCSn valid to DSPI_SCK delay DS4 DSPI_SCK to DSPI_PCSn invalid delay DS5 DSPI_SCK to DSPI_SOUT valid K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Figure 26. ULPI timing diagram Min. 2.7 — ...

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... First data Data Last data Description Max. Unit Notes — ns — ns — ns DS4 Min. Max. Unit 2.7 3 MHz — ns BUS (t /2) − / SCK SCK — — — — ns — — Freescale Semiconductor, Inc. ...

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... The DSPI module can operate across the entire operating voltage for the processor, but to run across the full voltage range the maximum frequency of operation is reduced. 2. The delay is programmable in SPIx_CTARn[PSSCK] and SPIx_CTARn[CSSCK]. 3. The delay is programmable in SPIx_CTARn[PASC] and SPIx_CTARn[ASC]. K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors DS10 DS15 DS12 ...

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... First data Data DS14 First data Data DS4 Min. Max. Unit 1.71 3.6 V — 7.5 MHz — ns BUS (t / SCK SCK/2) — — — — ns — — DS9 DS16 DS11 Last data Last data Freescale Semiconductor, Inc. ...

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... Table 47. SDHC switching specifications over the full operating voltage range Num Symbol Description Operating voltage K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Card input clock Card input clock Table continues on the next page... Min. Max. ...

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... K20 Sub-Family Data Sheet, Rev. 4, 10/2012. 68 SD3 SD2 SD1 SD6 SD7 SD8 Figure 31. SDHC timing Min. Max. Unit 0 400 kHz 0 25 MHz 0 20 MHz 0 400 kHz 7 — — ns — — 6 — ns 1.3 — ns Freescale Semiconductor, Inc. ...

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... I2S_RXD/I2S_RX_FS input hold after I2S_RX_BCLK I2S_MCLK (output) I2S_TX_BCLK/ S4 I2S_RX_BCLK (output) S5 I2S_TX_FS/ I2S_RX_FS (output) I2S_TX_FS/ I2S_RX_FS (input) S7 I2S_TXD I2S_RXD Figure 32. I2S/SAI timing — master modes K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 2.7 40 45% 80 45% — 0 — ...

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... Normal Run, Wait and Stop modes. K20 Sub-Family Data Sheet, Rev. 4, 10/2012. 70 Min. 2.7 80 45% 4.5 2 — — — S11 S12 S15 S16 S18 Max. Unit 3.6 V — ns 55% MCLK period — ns — — ns — ns — S16 S14 S16 Freescale Semiconductor, Inc. ...

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... Table 51. I2S/SAI slave mode timing in Normal Run, Wait and Stop modes (full voltage range) Num. Characteristic Operating voltage S11 I2S_TX_BCLK/I2S_RX_BCLK cycle time (input) S12 I2S_TX_BCLK/I2S_RX_BCLK pulse width high/low (input) K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1.71 40 45% 80 45% — -1.0 — ...

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... S11 S12 S13 S15 S19 S16 S17 S18 Min. 1.71 Table continues on the next page... K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Max. Unit — ns — 20.6 — ns — ns — S16 S14 S16 Max. Unit 3.6 V Freescale Semiconductor, Inc. ...

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... Figure 36. I2S/SAI timing — master modes Table 53. I2S/SAI slave mode timing in VLPR, VLPW, and VLPS modes (full voltage range) Num. Characteristic Operating voltage S11 I2S_TX_BCLK/I2S_RX_BCLK cycle time (input) S12 I2S_TX_BCLK/I2S_RX_BCLK pulse width high/low (input) Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 62.5 45% 250 45% — 0 — -1.6 ...

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... Min. 1.71 1 — — Table continues on the next page... K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Max. Unit — ns — — ns — ns — S16 S14 S16 Typ. Max. Unit Notes — 3 500 MHz 2, 1 1.8 MHz 2, Freescale Semiconductor, Inc ...

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... Time to do one complete measurement of the electrode. Sensitivity resolution of 0.0133 pF NSCN = 0, 1 electrode, EXTCHRG = 7. 13. REFCHRG=0, EXTCHRG=4, PS=7, NSCN=0F, LPSCNITV=F, LPO is selected (1 kHz), and fixed external capacitance of 20 pF. Data is captured with an average of 7 periods window. 7 Dimensions K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Min. Typ. Max. — 1 — ...

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... NC NC K20 Sub-Family Data Sheet, Rev. 4, 10/2012. 76 www.freescale.com and perform a keyword search for Then use this document number 98ASS23177W 98ASA00222D Active pull direction after reset pulldown pullup pullup pullup pullup ALT1 ALT2 ALT3 ALT4 ALT5 ALT6 ALT7 EzPort Freescale Semiconductor, Inc. ...

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... ADC0_DM1 ADC0_DM1 25 K1 PGA3_DP/ PGA3_DP/ PGA3_DP/ ADC3_DP0/ ADC3_DP0/ ADC3_DP0/ ADC2_DP3/ ADC2_DP3/ ADC2_DP3/ ADC1_DP1 ADC1_DP1 ADC1_DP1 K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTE0 SPI1_PCS1 UART1_TX SDHC0_D1 PTE1/ SPI1_SOUT UART1_RX SDHC0_D0 LLWU_P0 PTE2/ SPI1_SCK UART1_CTS_ SDHC0_DCLK ...

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... XTAL1 XTAL1 47 K4 PTE26 ADC3_SE5b ADC3_SE5b K20 Sub-Family Data Sheet, Rev. 4, 10/2012. 78 ALT1 ALT2 ALT3 ALT4 PTE24 CAN1_TX UART4_TX I2S1_TX_FS PTE25 CAN1_RX UART4_RX I2S1_TX_ BCLK PTE26 UART4_CTS_ I2S1_TXD0 b ALT5 ALT6 ALT7 EzPort EWM_OUT_b I2S1_RXD1 EWM_IN I2S1_TXD1 RTC_CLKOUT USB_CLKIN Freescale Semiconductor, Inc. ...

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... K10 PTA16 CMP3_IN2 CMP3_IN2 69 K11 PTA17 ADC1_SE17 ADC1_SE17 70 E8 VDD VDD VDD 71 G8 VSS VSS VSS K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTE27 UART4_RTS_ I2S1_MCLK b PTE28 PTA0 UART0_CTS_ FTM0_CH5 b/ UART0_COL_ b PTA1 UART0_RX FTM0_CH6 PTA2 ...

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... ALT5 ALT6 ALT7 EzPort LPTMR0_ ALT1 FB_A29 FB_A28 FB_A27 FB_A26 FB_A25 FB_A24 FTM1_QD_ PHA FTM1_QD_ PHB FTM0_FLT3 FTM0_FLT0 FTM1_FLT0 FTM2_FLT0 FB_AD23 FB_AD22 FB_AD21 FB_AD20 FB_AD19 FTM0_FLT1 FB_AD18 FTM0_FLT2 FB_AD17 EWM_IN FB_AD16 EWM_OUT_b FB_AD15 FTM2_QD_ PHA FB_OE_b FTM2_QD_ PHB Freescale Semiconductor, Inc. ...

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... PTC15 DISABLED 121 — VSS VSS VSS 122 — VDD VDD VDD 123 A6 PTC16 DISABLED K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTB20 SPI2_PCS0 PTB21 SPI2_SCK PTB22 SPI2_SOUT PTB23 SPI2_SIN SPI0_PCS5 PTC0 SPI0_PCS4 PDB0_EXTRG PTC1/ ...

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... FB_TBST_b/ NFC_CE1_b FB_CS2_b/ FB_BE15_8_b FB_CS3_b/ FB_TA_b FB_BE7_0_b FB_ALE/ I2S1_RXD1 FB_CS1_b/ FB_TS_b FB_CS0_b I2S1_RXD0 FB_AD4 I2S1_RX_FS FB_AD3 I2S1_RX_ BCLK FB_AD2/ EWM_IN NFC_DATA1 FB_AD1/ EWM_OUT_b NFC_DATA0 FB_AD0 FTM0_FLT0 FTM0_FLT1 FB_A16/ NFC_CLE FB_A17/ NFC_ALE FB_A18/ NFC_RE FB_A19 FB_A20 FB_A21 FB_A22 FB_A23 Freescale Semiconductor, Inc. ...

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... PGA1_DP/ADC1_DP0/ADC0_DP3 29 PGA1_DM/ADC1_DM0/ADC0_DM3 30 VDDA 31 VREFH 32 VREFL 33 VSSA 34 ADC1_SE16/CMP2_IN2/ADC0_SE22 35 ADC0_SE16/CMP1_IN2/ADC0_SE21 36 Figure 38. K20 144 LQFP Pinout Diagram K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Pinout 108 VDD 107 VSS 106 PTC3/LLWU_P7 105 PTC2 104 PTC1/LLWU_P6 103 PTC0 102 PTB23 101 PTB22 100 ...

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... PTB19 PTB18 E PTB17 PTB16 PTB11 PTB10 F PTB9 PTB8 PTB7 PTB6 G PTB5 PTB4 PTB3 PTB2 PTB0/ H PTB1 PTA29 PTA28 LLWU_P5 PTA13/ J PTA27 PTA26 PTA25 LLWU_P4 K PTA12 PTA16 PTA17 PTA24 L PTA11 PTA14 PTA15 RESET_b M PTA10 VSS PTA19 PTA18 Freescale Semiconductor, Inc. ...

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... K20 Sub-Family Data Sheet, Rev. 4, 10/2012. Freescale Semiconductor, Inc. Revision History 85 ...

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... Freescale Semiconductor makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any liability, including without limitation consequential or incidental damages. "Typical" parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time ...