MPC8543VTAQGA Freescale Semiconductor, MPC8543VTAQGA Datasheet - Page 7

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MPC8543VTAQGA

Manufacturer Part Number
MPC8543VTAQGA
Description
Microprocessors - MPU PQ3 8543
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8543VTAQGA

Product Category
Microprocessors - MPU
Rohs
yes
Processor Series
PowerQUICC III
Data Bus Width
32 bit
Maximum Clock Frequency
1000 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Package / Case
BGA
I/o Voltage
1.8 V, 2.5 V, 3.3 V
Minimum Operating Temperature
0 C
Freescale Semiconductor
— Buffer descriptors backward compatible with MPC8260 and MPC860T 10/100 Ethernet
— RMON statistics support
— 10-Kbyte internal transmit and 2-Kbyte receive FIFOs
— MII management interface for control and status
— Ability to force allocation of header information and buffer descriptors into L2 cache
OCeaN switch fabric
— Full crossbar packet switch
— Reorders packets from a source based on priorities
— Reorders packets to bypass blocked packets
— Implements starvation avoidance algorithms
— Supports packets with payloads of up to 256 bytes
Integrated DMA controller
— Four-channel controller
— All channels accessible by both the local and remote masters
— Extended DMA functions (advanced chaining and striding capability)
— Support for scatter and gather transfers
— Misaligned transfer capability
— Interrupt on completed segment, link, list, and error
— Supports transfers to or from any local memory or I/O port
— Selectable hardware-enforced coherency (snoop/no snoop)
— Ability to start and flow control each DMA channel from external 3-pin interface
— Ability to launch DMA from single write transaction
Two PCI/PCI-X controllers
— PCI 2.2 and PCI-X 1.0 compatible
— One 32-/64-bit PCI/PCI-X port with support for speeds of up to 133 MHz (maximum PCI-X
— One 32-bit PCI port with support for speeds from 16 to 66 MHz (available when the other port
— Host and agent mode support
— 64-bit dual address cycle (DAC) support
— PCI-X supports multiple split transactions
— Supports PCI-to-memory and memory-to-PCI streaming
– VRRP and HSRP support for seamless router fail-over
– Up to 16 exact-match MAC addresses supported
– Broadcast address (accept/reject)
– Hash table match on up to 512 multicast addresses
– Promiscuous mode
programming models
frequency in synchronous mode is 110 MHz)
is in 32-bit mode)
MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 9
Overview
7

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