595FC270M000DG Silicon Labs, 595FC270M000DG Datasheet
595FC270M000DG
Specifications of 595FC270M000DG
Related parts for 595FC270M000DG
595FC270M000DG Summary of contents
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TAG E ONTR OLLED 10 810 Features Available with any-rate output frequencies from 10 to 810 MHz ® 3rd generation DSPLL with superior jitter performance Internal fixed fundamental mode ...
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Si 595 1. Electrical Specifications Table 1. Recommended Operating Conditions Parameter 1 Supply Voltage Supply Current 2 Output Enable (OE) Operating Temperature Range Notes: 1. Selectable parameter specified by part number. See 3. "Ordering Information" on page 7 for further ...
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Table 3. CLK± Output Frequency Characteristics Parameter Symbol 1,2,3 f Nominal Frequency O 1,4 Temperature Stability 1,4 Absolute Pull Range APR 5 Power up Time t OSC Notes: 1. See Section 3. "Ordering Information" on page 7 for further details. ...
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Si 595 Table 5. CLK± Output Phase Jitter Parameter Symbol 1,2 Phase Jitter (RMS) for MHz < F OUT OUT 810 MHz Notes: 1. Refer to AN256 for further information. 2. For best jitter and phase noise ...
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Table 8. Environmental Compliance and Package Information Parameter Mechanical Shock Mechanical Vibration Solderability Gross and Fine Leak Resistance to Solder Heat Moisture Sensitivity Level Contact Pads Table 9. Absolute Maximum Ratings Parameter Maximum Operating Temperature Supply Voltage Input Voltage Storage ...
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Si 595 2. Pin Descriptions Pin Name OE* 3 GND 4 CLK+ CLK– 5 (N/C for CMOS *Note: OE pin includes a 17 k resistor to V See 3. "Ordering Information" on page ...
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... Specific device configurations are programmed into the Si595 at time of shipment. Configurations are DD specified using the Part Number Configuration chart shown below. Silicon Labs provides a web browser-based part number configuration utility to simplify this process. Refer to and for further ordering instructions. The Si595 VCXO series is supplied in an industry-standard, RoHS compliant, lead-free, 6-pad package ...
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Si 595 4. Outline Diagram and Suggested Pad Layout Figure 2 illustrates the package details for the Si595. Table 11 lists the values for the dimensions shown in the illustration. Table 11. Package Diagram Dimensions (mm) Dimension ...
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Si5xx Mark Specification Figure 3 illustrates the mark specification for the Si595. Table 12 lists the line information. Table 12. Si595 Top Mark Description Line Position 1 1–10 “SiLabs”+ Part Family Number, 595 (First 3 characters in part ...
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Si 595 6. 6-Pin PCB Land Pattern Figure 4 illustrates the 6-pin PCB land pattern for the Si595. Table 13 lists the values for the dimensions shown in the illustration. Table 13. PCB Land Pattern Dimensions (mm) Dimension D2 e ...
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OCUMENT HANGE IST Revision 0.1 to Revision 0.2 Updated Table 5, “CLK± Output Phase Jitter,” on page 4. Updated typical phase jitter from 0.6 to 0.7 ps for 380 ppm/V. Revision 0.2 to ...
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... Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized ap- plication, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages. Silicon Laboratories, Silicon Labs, and DSPLL are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders. ...