571CCC000654DG Silicon Labs, 571CCC000654DG Datasheet - Page 24

• Manufacturer Part Number: 571CCC000654DG
• Description: VCXO Oscillators PRGRMMBL VCXO 8 PIN 0.5PS RS JTR
• Manufacturer: Silicon Labs

Specifications of 571CCC000654DG

• Product Category: VCXO Oscillators
• Rohs: yes
• Package / Case: 7 mm x 5 mm
• Frequency: 19.2 MHz
• Frequency Stability: 50 PPM
• Supply Voltage: 3.3 V
• Termination Style: SMD/SMT
• Dimensions: 5 mm W x 7 mm L x 1.65 mm H
• Mounting Style: SMD/SMT
• Product: VCXO

Si570/Si571
Register 135. Reset/Freeze/Memory Control
Reset settings = 00xx xx00
Register 137. Freeze DCO
Reset settings = 00xx xx00
24
Name RST_REG
Name
Type
Type
Bit
Bit
3:1
7:5
3:0
Bit
Bit
7
6
5
4
0
4
Freeze DCO
R/W
D7
D7
RST_REG
Reserved
Reserved
Freeze M
NewFreq
RECALL
VCADC
Freeze
Name
Name
N/A
NewFreq
R/W
D6
D6
Internal Reset.
0 = Normal operation.
1 = Reset of all internal logic. Output tristated during reset.
Upon completion of internal logic reset, RST_REG is internally reset to zero.
Note: Asserting RST_REG will interrupt the I
New Frequency Applied.
Alerts the DSPLL that a new frequency configuration has been applied. This bit will
clear itself when the new frequency is applied.
Freezes the M Control Word.
Prevents interim frequency changes when writing RFREQ registers.
Freezes the VC ADC Output Word.
May be used to hold the nominal output frequency of an Si571.
Always Zero.
Recall NVM into RAM.
0 = No operation.
1 = Write NVM bits into RAM. Bit is internally reset following completion of operation.
Note: Asserting RECALL reloads the NVM contents in to the operating registers without
Freeze DCO.
Freezes the DSPLL so the frequency configuration can be modified.
approach for starting from initial conditions.
interrupting the I
initial conditions.
Freeze M
R/W
D5
D5
Freeze VCADC
2
C state machine. It is the recommended approach for starting from
Freeze
DCO
R/W
D4
Rev. 1.3
R/W
D4
Function
Function
D3
2
D3
C state machine. It is not the recommended
D2
R/W
N/A
D2
D1
D1
RECALL
R/W
D0
D0