SST25LF020A-33-4E-SA Microchip Technology, SST25LF020A-33-4E-SA Datasheet - Page 15

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SST25LF020A-33-4E-SA

Manufacturer Part Number
SST25LF020A-33-4E-SA
Description
Flash 2 Mbit 33MHz
Manufacturer
Microchip Technology
Datasheet

Specifications of SST25LF020A-33-4E-SA

Product Category
Flash
Memory Size
2 Mbit
Interface Type
SPI
Access Time
33 ns
Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOIC-8
2 Mbit SPI Serial Flash
SST25LF020A
Write-Enable (WREN)
The Write-Enable (WREN) instruction sets the Write-
Enable-Latch bit to 1 allowing Write operations to occur.
The WREN instruction must be executed prior to any Write
(Program/Erase) operation. CE# must be driven high
before the WREN instruction is executed.
Write-Disable (WRDI)
The Write-Disable (WRDI) instruction resets the Write-
Enable-Latch bit and AAI bit to 0 disabling any new Write
operations from occurring. CE# must be driven high before
the WRDI instruction is executed.
Enable-Write-Status-Register (EWSR)
The Enable-Write-Status-Register (EWSR) instruction
arms the Write-Status-Register (WRSR) instruction and
opens the status register for alteration. The Enable-Write-
Status-Register instruction does not have any effect and
will be wasted, if it is not followed immediately by the Write-
Status-Register (WRSR) instruction. CE# must be driven
low before the EWSR instruction is entered and must be
driven high before the EWSR instruction is executed.
©2010 Silicon Storage Technology, Inc.
FIGURE 13: Write Enable (WREN) Sequence
FIGURE 14: Write Disable (WRDI) Sequence
SCK
CE#
SCK
CE#
SO
SO
SI
SI
MODE 3
MODE 0
MODE 3
MODE 0
HIGH IMPEDANCE
HIGH IMPEDANCE
MSB
0 1 2 3 4 5 6 7
MSB
0 1 2 3 4 5 6 7
15
04
06
1242 F13.0
1242 F12.0
S71242-07-000
Data Sheet
01/10

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