SST25LF020A-33-4E-SA Microchip Technology, SST25LF020A-33-4E-SA Datasheet - Page 7

• Manufacturer Part Number: SST25LF020A-33-4E-SA
• Description: Flash 2 Mbit 33MHz
• Manufacturer: Microchip Technology

Specifications of SST25LF020A-33-4E-SA

• Product Category: Flash
• Memory Size: 2 Mbit
• Interface Type: SPI
• Access Time: 33 ns
• Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-8

2 Mbit SPI Serial Flash
SST25LF020A
Block Protection (BP1, BP0)
The Block-Protection (BP1, BP0) bits define the size of the
memory area, as defined in Table 5, to be software pro-
tected against any memory Write (Program or Erase)
operations. The Write-Status-Register (WRSR) instruction
is used to program the BP1 and BP0 bits as long as WP#
is high or the Block-Protect-Lock (BPL) bit is 0. Chip-Erase
can only be executed if Block-Protection bits are both 0.
After power-up, BP1 and BP0 are set to 1.
TABLE 5: Software Status Register Block Protection
Auto Address Increment (AAI)
The Auto Address Increment Programming-Status bit pro-
vides status on whether the device is in AAI programming
mode or Byte-Program mode. The default at power up is
Byte-Program mode.
©2010 Silicon Storage Technology, Inc.
1. Default at power-up for BP1 and BP0 is ‘11’.
3 (Full Memory Array)
1 (1/4 Memory Array)
2 (1/2 Memory Array)
Protection Level
0
BP1
0
0
1
1
Register
Status
Bit
7
1
Block Protection Lock-Down (BPL)
WP# pin driven low (V
Lock-Down (BPL) bit. When BPL is set to 1, it prevents any
further alteration of the BPL, BP1, and BP0 bits. When the
WP# pin is driven high (V
its value is “Don’t Care”. After power-up, the BPL bit is
reset to 0.
BP0
0
1
0
1
IL
), enables the Block-Protection-
IH
), the BPL bit has no effect and
Protected Memory Area
030000H-03FFFFH
020000H-03FFFFH
000000H-03FFFFH
2 Mbit
None
S71242-07-000
Data Sheet
T5.0 1242
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