MAX9856ATL/V+ Maxim Integrated, MAX9856ATL/V+ Datasheet - Page 41

• Manufacturer Part Number: MAX9856ATL/V+
• Description: Interface - CODECs Low-Power Audio Codec With Directdrive. Headphone Amplifiers
• Manufacturer: Maxim Integrated
• Series: MAX9856r

Specifications of MAX9856ATL/V+

• Resolution: 18 bit
• Interface Type: Serial (I2C)
• Number Of Adcs: 2
• Number Of Dacs: 2
• Operating Supply Voltage: 1.71 V to 3.6 V
• Supply Current: 2.9 mA
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 1.71 V
• Thd Plus Noise: 82 dB

A write to the MAX9856 includes transmission of a
START condition, the slave address with the R/W bit set
to 0, 1 byte of data to configure the internal register
address pointer, 1 or more bytes of data, and a STOP
condition. Figure 11 illustrates the proper frame format
for writing 1 byte of data to the MAX9856. Figure 12
illustrates the frame format for writing n-bytes of data to
the MAX9856.
The slave address with the R/W bit set to 0 indicates
that the master intends to write data to the MAX9856.
The MAX9856 acknowledges receipt of the address
byte during the master-generated 9th SCL pulse.
The second byte transmitted from the master config-
ures the MAX9856’s internal register address pointer.
Figure 11. Writing 1 Byte of Data to the MAX9856
Figure 12. Writing n Bytes of Data to the MAX9856
S
S
ACKNOWLEDGE FROM MAX9856
SLAVE ADDRESS
ACKNOWLEDGE FROM MAX9856
SLAVE ADDRESS
______________________________________________________________________________________
R/W
0
A
R/W
ACKNOWLEDGE FROM MAX9856
Write Data Format
DirectDrive Headphone Amplifiers
0
REGISTER ADDRESS
A
Low-Power Audio CODEC with
ACKNOWLEDGE FROM MAX9856
REGISTER ADDRESS
A
ACKNOWLEDGE FROM MAX9856
B7 B6
The pointer tells the MAX9856 where to write the next
byte of data. An acknowledge pulse is sent by the
MAX9856 upon receipt of the address pointer data.
The third byte sent to the MAX9856 contains the data
that is written to the chosen register. An acknowledge
pulse from the MAX9856 signals receipt of the data
byte. The address pointer autoincrements to the next
register address after each received data byte. This
autoincrement feature allows a master to write to
sequential registers within one continuous frame. Figure
12 illustrates how to write to multiple registers with one
frame. The master signals the end of transmission by
issuing a STOP condition.
Register addresses greater than 0x1C are reserved. Do
not write to these addresses.
B5 B4
DATA BYTE 1
1 BYTE
REGISTER ADDRESS POINTER
AUTOINCREMENT INTERNAL
B3 B2
B1 B0
A
B7
A
B6
ACKNOWLEDGE FROM MAX9856
ACKNOWLEDGE FROM MAX9856
B5
B7 B6
DATA BYTE
B4
1 BYTE
B5 B4
DATA BYTE n
B3
1 BYTE
B2
B3 B2
REGISTER ADDRESS POINTER
AUTOINCREMENT INTERNAL
B1
B1 B0
B0
A
A
P
P
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