MAX9856ATL/V+ Maxim Integrated, MAX9856ATL/V+ Datasheet - Page 5

• Manufacturer Part Number: MAX9856ATL/V+
• Description: Interface - CODECs Low-Power Audio Codec With Directdrive. Headphone Amplifiers
• Manufacturer: Maxim Integrated
• Series: MAX9856r

Specifications of MAX9856ATL/V+

• Resolution: 18 bit
• Interface Type: Serial (I2C)
• Number Of Adcs: 2
• Number Of Dacs: 2
• Operating Supply Voltage: 1.71 V to 3.6 V
• Supply Current: 2.9 mA
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 1.71 V
• Thd Plus Noise: 82 dB

ELECTRICAL CHARACTERISTICS (continued)
(V
C
otherwise noted. Typical values are at T
ADC/DAC DATA RATE ACCURACY
LRCLK_D and LRCLK_A Output
Average Sample Rate Deviation
(Master Mode, Any MCLK)
LRCLK_D Output Sample Rate
Deviation (Master Mode)
LRCLK Input Sample Rate Range
(Slave Mode)
LRCLK_D and LRCLK_A PLL
Lock Time
LRCLK_D and LRCLK_A
Acceptable Jitter for Maintaining
PLL Lock (All Slave Modes)
HEADPHONE AMPLIFIERS
Output Power
0dBFS DAC Output Voltage
Line In to HP Out Voltage Gain
Output Offset Voltage
Total Harmonic Distortion Plus
Noise
Dynamic Range
Power-Supply Rejection Ratio
Capacitive Drive
Crosstalk
Channel Gain Matching
Click-and-Pop Level
LINE AMPLIFIERS
0dBFS DAC Output Voltage
Line-In to Line-Out Voltage Gain
Output Offset Voltage
NREG
AVDD
= 1µF, A
= V
PARAMETER
CPVDD
VPRE
= V
_______________________________________________________________________________________
= +20dB, C
DVDDS2
= V
MICBIAS
DVDD
SYMBOL
A
THD+N
DirectDrive Headphone Amplifiers
VMATCH
t
PSRR
A
P
LOCK
V
V
DR
C
OUT
= 1.8V, R
= +25°C.) (Note 1)
OS
OS
L
= 1µF, A
Low-Power Audio CODEC with
(Note 8)
PCLK/LRCLK = 1536, 1024, 768, 512, 384,
256, 192, or 128
LRCLK_A, LRCLK_D (DHF = 0)
LRCLK_D (DHF = 1)
Any allowable LRCLK and PCLK rates
Allowable LRCLK period change from
nominal for slave PLL mode at any
allowable LRCLK and PCLK rates
f = 1kHz, THD < 1%,
T
+0dB volume setting
+4.5dB volume setting, 0dB PGA setting
T
R
R
+5.5dB volume setting, DAC input at
f
V
V
V
No sustained oscillations
P
(HPR to HPL)
Peak voltage,
A-weighted, 32 samples
per second
0dB input PGA setting
T
S
A
A
A
L
L
AVDD
RIPPLE
RIPPLE
OUT
HP
VMIGPGA
= 44.1kHz (Note 4)
= +25°C
= +25°C, -40dB volume setting
= 32Ω, P
= 16Ω, P
= +25°C
= 32Ω, R
= 1.6mW, f = 1kHz, (HPL to HPR) or
= 1.71V to 3.6V
= 100mV
= 100mV
= 0dB, f
OUT
OUT
LINE
CONDITIONS
= 25mW, f = 1kHz
= 25mW, f = 1kHz
P-P
P-P
= 10kΩ, C1 = 4.7µF, C2 = 4.7µF, C
MCLK
, f = 217Hz
, f = 10kHz
= 11.2896MHz, DRATE = 00, T
R
R
Into shutdown
Out of shutdown
L
L
= 16Ω
= 32Ω
-0.025
15.6
3.40
MIN
7.8
1.3
15
80
70
±0.6
±0.7
REF
TYP
3.51
1.77
0.03
0.05
1.34
150
-70
-70
1.0
±2
A
12
35
28
91
94
80
50
69
0
= T
= C
MIN
+0.025
MBIAS
MAX
3.80
±20
±10
100
1.4
±4
50
25
to T
MAX
= C
UNITS
, unless
V
PREG
V
dBV
kHz
mW
V/V
mV
V/V
mV
ms
dB
dB
pF
dB
RMS
ns
%
%
%
%
P-P
5
=