11LC160-I/P Microchip Technology, 11LC160-I/P Datasheet - Page 7

• Manufacturer Part Number: 11LC160-I/P
• Description: IC EEPROM 16KBIT 100KHZ 8DIP
• Manufacturer: Microchip Technology

Specifications of 11LC160-I/P

• Memory Size: 16K (2K x 8)
• Package / Case: 8-DIP (0.300", 7.62mm)
• Operating Temperature: -40°C ~ 85°C
• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Speed: 100kHz
• Interface: UNI/O™ (Single Wire)
• Voltage - Supply: 2.5 V ~ 5.5 V
• Organization: 2048 x 8
• Interface Type: Serial
• Maximum Clock Frequency: 100 KHz
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.5 V
• Maximum Operating Current: 50 uA
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3.3 V, 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

1.2.14
The SAK bit occurs as the second bit of the Acknowl-
edge sequence and is sent strictly by the slave device
regardless of which device transmitted the preceding
byte. A SAK is sent as a ‘
no edge at all (i.e., no device transmitting).
A NoSAK will occur after each full byte that is transmit-
ted before the end of the device address. For exam-
ple, for 8-bit addressing, a NoSAK will occur after the
start header only, and for 12-bit addressing, a NoSAK
will occur after both the start header and the MSB of
the device address.
1.2.15
Idle mode is a device mode during which a slave device
ignores all serial communication until the reception of a
standby pulse. Slave devices enter this mode after
release from POR, as well as any time an error
condition occurs.
1.2.16
Standby mode is a low-power device mode during
which a slave device awaits a high-to-low transition on
SCIO, marking the beginning of the start header. Slave
devices enter this mode upon reception of a standby
pulse and after the successful termination of a
command via a NoMAK/SAK combination.
1.2.17
Hold provides a method for the master to pause serial
communication in order to service interrupts or perform
other necessary functions. Hold mode is entered by
holding SCIO low during any given MAK bit period and
is exited by performing a standard Acknowledge
sequence with a MAK bit.
Hold mode is not required to be implemented on all
slave devices.
© 2009 Microchip Technology Inc.
SAK/NOSAK
IDLE MODE
STANDBY MODE
HOLD MODE
1
’, and a NoSAK appears as
UNI/O
DS22076D-page 7
®
Bus