IS61WV102416BLL-10TLI ISSI, Integrated Silicon Solution Inc, IS61WV102416BLL-10TLI Datasheet - Page 16

IC SRAM 16MBIT 10NS 48TSOP

IS61WV102416BLL-10TLI

Manufacturer Part Number
IS61WV102416BLL-10TLI
Description
IC SRAM 16MBIT 10NS 48TSOP
Manufacturer
ISSI, Integrated Silicon Solution Inc
Datasheet

Specifications of IS61WV102416BLL-10TLI

Format - Memory
RAM
Memory Type
SRAM - Asynchronous
Memory Size
16M (1M x 16)
Speed
10ns
Interface
Parallel
Voltage - Supply
2.4 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TSOP
Density
16Mb
Access Time (max)
10ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
3.3V
Address Bus
20b
Package Type
TSOP-I
Operating Temp Range
-40C to 85C
Number Of Ports
1
Supply Current
95mA
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.465V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Word Size
16b
Number Of Words
1M
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
706-1055
IS61WV102416BLL-10TLI

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IS61WV102416BLL-10TLI
Manufacturer:
KEMET
Quantity:
260 000
Part Number:
IS61WV102416BLL-10TLI
Manufacturer:
ISSI
Quantity:
5 530
Part Number:
IS61WV102416BLL-10TLI
Manufacturer:
ISSI
Quantity:
1 000
Part Number:
IS61WV102416BLL-10TLI
Manufacturer:
ISSI44
Quantity:
370
Part Number:
IS61WV102416BLL-10TLI
Manufacturer:
ISSI
Quantity:
20 000
IS61WV102416ALL
IS61WV102416BLL
IS64WV102416BLL
AC WAVEFORMS
WRITE CYCLE NO. 4
16
Notes:
1. The internal Write time is defined by the overlap of CE = LOW, UB and/or LB = LOW, and WE = LOW. All signals must be in valid states to initiate a Write, but
2. Tested with OE HIGH for a minimum of 4 ns before WE = LOW to place the I/O in a HIGH-Z state.
3. WE may be held LOW across many address cycles and the LB, UB pins can be used to control the Write function.
any can be deasserted to terminate the Write. The
ADDRESS
UB, LB
D
OUT
WE
D
OE
CE
IN
LOW
DATA UNDEFINED
(LB, UB Controlled, Back-to-Back Write)
t
HZWE
ADDRESS 1
t
SA
t
,
t
SD
HA
t
t
SA
WORD 1
WC
,
t
t
PBW
SD
HIGH-Z
Integrated Silicon Solution, Inc. — www.issi.com —
, and
DATA
VALID
t
IN
HD
timing is referenced to the rising or falling edge of the signal that terminates the Write.
t
t
HD
HA
t
SA
ADDRESS 2
(1,3)
t
t
SD
WC
WORD 2
t
PBW
DATA
VALID
IN
t
LZWE
t
HD
t
HA
UB_CEWR4.eps
1-800-379-4774
06/05/09
Rev. E

Related parts for IS61WV102416BLL-10TLI