AT89LP51ED2-20MU Atmel, AT89LP51ED2-20MU Datasheet - Page 175

• Manufacturer Part Number: AT89LP51ED2-20MU
• Description: 8-bit Microcontrollers - MCU 64KB 20MHz 2.4V-5.5V
• Manufacturer: Atmel

Specifications of AT89LP51ED2-20MU

• Rohs: yes
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 256 B
• On-chip Adc: Yes
• Operating Supply Voltage: 2.4 V to 5.5 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: VQFN-44
• Mounting Style: SMD/SMT
• Data Rom Size: 4 KB
• Interface Type: 2-Wire, SPI, UART
• Number Of Programmable I/os: 36
• Number Of Timers: 3
• Processor Series: AT89x
• Program Memory Type: Flash
• Factory Pack Quantity: 360

22. Instruction Set Summary
3714A–MICRO–7/11
The AT89LP51RD2/ED2/ID2 is fully binary compatible with the 8051 instruction set. In Compati-
bility mode the AT89LP51RD2/ED2/ID2 has identical execution time with AT89C51RD2/ED2
and other standard 8051s. The difference between the AT89LP51RD2/ED2/ID2 in Fast mode
and the standard 8051 is the number of cycles required to execute an instruction. Fast mode
instructions may take 1 to 5 clock cycles to complete. The execution times of most instructions
may be computed using
period of the output of the system clock divider. For Fast mode the divider defaults to 1, so the
clock cycle equals the oscillator period. For Compatibility mode the divider defaults to 2, so the
clock cycle is twice the oscillator period, or conversely the clock count is half the number of oscil-
lator periods.
Table 22-1.
Generic Instruction Types
Most arithmetic, logical, bit and transfer instructions
Branches and Calls
Single Byte Indirect (i.e. ADD A, @Ri, etc.)
RET, RETI
MOVC
MOVX
MUL
DIV
MAC
INC DPTR
Arithmetic
ADD A, Rn
ADD A, direct
ADD A, @Ri
ADD A, #data
ADDC A, Rn
ADDC A, direct
ADDC A, @Ri
ADDC A, #data
SUBB A, Rn
SUBB A, direct
SUBB A, @Ri
SUBB A, #data
INC Rn
INC direct
INC @Ri
INC A
Instruction Execution Times and Exceptions
Table
AT89LP51RD2/ED2/ID2 Preliminary
22-1. Note that for the purposes of this table, a clock cycle is one
Bytes
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
Compatibility
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
(1)
Clock Cycles
Fast Mode Cycle Count Formula
Fast
1
2
2
2
1
2
2
2
1
2
2
2
1
2
2
2
# bytes + 1
# bytes
4
2
4
3
2
4
9
2
(3)
Hex Code
28-2F
38-3F
98-9F
08-0F
26-27
36-37
96-97
06-07
25
24
35
34
95
94
05
04
175