AT89LP51ED2-20MU Atmel, AT89LP51ED2-20MU Datasheet - Page 74

• Manufacturer Part Number: AT89LP51ED2-20MU
• Description: 8-bit Microcontrollers - MCU 64KB 20MHz 2.4V-5.5V
• Manufacturer: Atmel

Specifications of AT89LP51ED2-20MU

• Rohs: yes
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 256 B
• On-chip Adc: Yes
• Operating Supply Voltage: 2.4 V to 5.5 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: VQFN-44
• Mounting Style: SMD/SMT
• Data Rom Size: 4 KB
• Interface Type: 2-Wire, SPI, UART
• Number Of Programmable I/os: 36
• Number Of Timers: 3
• Processor Series: AT89x
• Program Memory Type: Flash
• Factory Pack Quantity: 360

12.1.3
12.1.4
12.2
74
Port Analog Functions
AT89LP51RD2/ED2/ID2 Preliminary
Open-drain Output
Push-pull Output
The open-drain output configuration turns off all pull-ups and only drives the pull-down transistor
of the port pin when the port latch contains a logic “0”. To be used as a logic output, a port con-
figured in this manner must have an external pull-up, typically a resistor tied to V
down for this mode is the same as for the quasi-bidirectional mode. The open-drain port configu-
ration is shown in
during Power-down (see
Power-down when configured in this mode.
Figure 12-4. Open-Drain Output
The push-pull output configuration has the same pull-down structure as both the open-drain and
the quasi-bidirectional output modes, but provides a continuous strong pull-up when the port
latch contains a logic “1”. The push-pull mode may be used when more source current is needed
from a port output. The push-pull port configuration is shown in
Figure 12-5. Push-pull Output
The AT89LP51RD2/ED2/ID2 incorporates two analog comparators and an 8-channel analog-to-
digital converter. In order to give the best analog performance and minimize power consump-
tion, pins that are being used for analog functions must have both their digital outputs and digital
inputs disabled. Digital outputs are disabled by putting the port pins into the input-only mode as
described in
only mode after reset regardless of the state of the Tristate-Port Fuse.
Register
F rom P o r t
“Port Configuration” on page
F rom P o r t
Register
Figure
Figure
12-4. The input circuitry of P3.2, P3.3, P4.6 and P4.7 is not disabled
12-3) and therefore these pins should not be left floating during
Input
Data
PWD
71. The analog input pins will always default to input-
Input
Data
V
CC
PWD
Figure
P o r t
Pin
12-5.
P o r t
Pin
3714A–MICRO–711
DD
. The pull-