M24256-BWDW6TP STMicroelectronics, M24256-BWDW6TP Datasheet - Page 19

IC EEPROM 256KBIT 400KHZ 8TSSOP

M24256-BWDW6TP

Manufacturer Part Number
M24256-BWDW6TP
Description
IC EEPROM 256KBIT 400KHZ 8TSSOP
Manufacturer
STMicroelectronics
Datasheet

Specifications of M24256-BWDW6TP

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
256K (32K x 8)
Speed
400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-TSSOP
Density
256Kb
Interface Type
Serial (I2C)
Organization
32Kx8
Access Time (max)
900ns
Frequency (max)
400KHz
Write Protection
Yes
Data Retention
40Year
Operating Supply Voltage (typ)
3.3/5V
Package Type
TSSOP
Operating Temp Range
-40C to 85C
Supply Current
2mA
Operating Supply Voltage (min)
2.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-8622-2
M24256-BWDW6TP

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M24256-BWDW6TP
Manufacturer:
TI
Quantity:
12 400
Part Number:
M24256-BWDW6TP
Manufacturer:
ST
Quantity:
20 000
Part Number:
M24256-BWDW6TP@@@@@@
Manufacturer:
ST
0
M24256-BF, M24256-BR, M24256-BW, M24256-DR
3.13
3.14
Read operations
Read operations are performed independently of the state of the Write Control (WC) signal.
After the successful completion of a Read operation, the device’s internal address counter is
incremented by one, to point to the next byte address.
Figure 11. Read mode sequences
Random Address Read (in memory array)
A dummy Write is first performed to load the address into this address counter (as shown in
Figure
condition, and repeats the device select code, with the Read/Write bit (RW) set to 1. The
device acknowledges this, and outputs the contents of the addressed byte. The bus master
must not acknowledge the byte, and terminates the transfer with a Stop condition.
Current
Address
Read
Random
Address
Read
Sequential
Current
Read
Sequential
Random
Read
11) but without sending a Stop condition. Then, the bus master sends another Start
Dev sel *
Dev sel *
ACK
Dev sel
Dev sel
Data out N
R/W
R/W
R/W
ACK
ACK
ACK
ACK
R/W
Doc ID 6757 Rev 23
NO ACK
Data out 1
Byte addr
Byte addr
Data out
NO ACK
ACK
ACK
ACK
Byte addr
Byte addr
ACK
ACK
ACK
Data out N
Dev sel *
Dev sel *
NO ACK
R/W
ACK
ACK
R/W
Device operation
Data out 1
Data out
AI01105d
NO ACK
ACK
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