IDT70914S20PF IDT, Integrated Device Technology Inc, IDT70914S20PF Datasheet
IDT70914S20PF
Specifications of IDT70914S20PF
800-1370
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IDT70914S20PF Summary of contents
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... Industrial temperature range (-40°C to +85°C) is available for selected speeds. ◆ ◆ ◆ ◆ ◆ Recommended for replacement of IDT7099 ( separate 9th bit data control signals are not required ◆ Green parts available, see ordering information WRITE WRITE MEMOR MEMORY LOGIC LOGIC Y ARRAY ARRAY SENSE SENSE AMPS AMPS ...
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... High-Speed 36K ( Synchronous Dual-Port Static RAM Description The IDT70914 is a high-speed bit synchronous Dual-Port RAM. The memory array is based on Dual-Port memory cells to allow simultaneous access from both ports. Registers on control, data, and address inputs provide low set-up and hold times. The timing latitude provided by this approach allow systems to be designed with very short cycle times ...
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IDT70914S High-Speed 36K ( Synchronous Dual-Port Static RAM (1,2,3) Pin Configuration Reference N 10L 6 A 11L 7 N N/C ...
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IDT70914S High-Speed 36K ( Synchronous Dual-Port Static RAM Absolute Maximum Ratings Symbol Rating Commercial & Industrial (2) V Terminal Voltage -0.5 to +7.0 TERM with Respect to GND (2) V Terminal Voltage -0 TERM T Temperature ...
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IDT70914S High-Speed 36K ( Synchronous Dual-Port Static RAM DC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range Symbol Parameter CE I Dynamic Operating CC Current Outputs Disabled (Both Ports Active Standby ...
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IDT70914S High-Speed 36K ( Synchronous Dual-Port Static RAM AC Test Conditions Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels Output Load DATA OUT 347Ω Figure 1. AC Output Test load. ∆tCD (Typical, ns) ...
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IDT70914S High-Speed 36K ( Synchronous Dual-Port Static RAM AC Electrical Characteristics Over the Operating Temperature Range (Read and Write Cycle Timing) (Commercial ± 10 Symbol t Clock Cycle Time CYC t Clock High ...
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IDT70914S High-Speed 36K ( Synchronous Dual-Port Static RAM Timing Waveform of Read Cycle, Either Side t CLK CH CLKEN R/W ADDRESS An DATA OUT t CKLZ OE Timing Waveform of Write with Port-to-Port Read CLK ...
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IDT70914S High-Speed 36K ( Synchronous Dual-Port Static RAM Timing Waveform of Read-to-Write Cycle No CLK CH CLKEN CE R/W ADDRESS An DATA IN DATA OUT t CKLZ Timing Waveform of Read-to-Write Cycle No. 2 CLK CLKEN ...
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... Clock enable inputs are provided to stall the operation of the address and data input registers without introducing clock skew for very fast interleaved memory applications. A HIGH on the CE input for one clock cycle will power down the internal circuitry to reduce static power consumption. ...
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IDT70914S High-Speed 36K ( Synchronous Dual-Port Static RAM Ordering Information A XXXXX 99 A Device Power Speed Package Type NOTE: 1. Industrial temperature range is available on selected TQFP packages in standard power. For specific speeds, packages and ...