CY8CKIT-050B Cypress Semiconductor, CY8CKIT-050B Datasheet - Page 19

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CY8CKIT-050B

Manufacturer Part Number
CY8CKIT-050B
Description
Development Boards & Kits - ARM PSoC 5LP Development Kit
Manufacturer
Cypress Semiconductor
Datasheet

Specifications of CY8CKIT-050B

Rohs
yes
Product
Development Kits
Tool Is For Evaluation Of
PSoC 5LP
Core
ARM Cortex M3
Interface Type
RS-232, USB
Operating Supply Voltage
9 V/12 V
4.2.1.1
CY8CKIT-050 PSoC® 5LP Development Kit Guide, Doc. # 001-65816 Rev. *E
The board power domain has five rails:
The following block diagram shows the structure of the power system on the board.
Figure 4-2. Power System Structure
Power Supply Jumper Settings
Figure 4-3. Jumper Settings
Communication
Programming
12-V/9-V Wall
9-V Battery
Vin rail: This is where the input of the on-board regulators are connected. This domain is
powered through protection diodes.
5-V rail: This is the output of the 5-V regulator U2. The rail is a fixed 5-V output regardless of
jumper settings. The voltage in this rail can be less than 5 V only when the board is powered by
the USB. This 5-V rail powers the circuits that require fixed 5-V supply.
3.3-V rail: This is the output of the 3.3-V regulator U4. This rail remains 3.3 V regardless of
jumper settings or power source changes. It powers the circuits requiring fixed 3.3-V supply such
as the on-board programming section.
Vddd rail: This rail provides power to the digital supply for the PSoC device. It can be derived
from either the 5-V or 3.3-V rail. The selection is made using J10 (3-pin jumper).
Vdda rail: This rail provides power to the analog supply of the PSoC device. It is the output of a
low noise regulator U1. The regulator is a variable output voltage and can be either 3.3 V or 5 V.
This is done by changing the position on J11 (3-pin jumper).
Power
USB
USB
wart
Vin
5 V
5-V/3.3-V Analog
3.3-V Regulator
5-V Regulator
Regulator
Selection
Selection
Vddd
Vdda
(J10)
(J11)
3.3 V
Vddd
Vdda
Hardware
5 V
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