EVAL-AD7450ASDZ

Manufacturer Part NumberEVAL-AD7450ASDZ
DescriptionData Conversion IC Development Tools EVALUATION BOARD I.C.
ManufacturerAnalog Devices
TypeADC
SeriesAD7450A
EVAL-AD7450ASDZ datasheet
 


Specifications of EVAL-AD7450ASDZ

RohsyesProductEvaluation Boards
Tool Is For Evaluation OfAD7450AInterface TypeSerial
Operating Supply Voltage2.7 V to 5.25 VMaximum Operating Temperature+ 85 C
Minimum Operating Temperature- 40 CFactory Pack Quantity1
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PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
V
1
8
DD
AD7440/
SCLK
2
7
AD7450A
SDATA
3
6
TOP VIEW
CS
(Not to Scale)
4
5
Figure 5. Pin Configuration for 8-Lead SOT-23
Table 5. Pin Function Descriptions
Mnemonic
Function
V
Reference Input for the AD7440/AD7450A. An external reference must be applied to this input. For a 5 V power supply, the
REF
reference is 2.5 V (±1%) for specified performance. For a 3 V power supply, the reference is 2 V (±1%) for specified
performance. This pin should be decoupled to GND with a capacitor of at least 0.1 μF. See the Reference section for more
details.
V
Positive Terminal for Differential Analog Input.
IN+
V
Negative Terminal for Differential Analog Input.
IN–
GND
Analog Ground. Ground reference point for all circuitry on the AD7440/AD7450A. All analog input signals and any external
reference signal should be referred to this GND voltage.
CS
Chip Select. Active low logic input. This input provides the dual function of initiating a conversion on the AD7440/AD7450A
and framing the serial data transfer.
SDATA
Serial Data. Logic output. The conversion result from the AD7440/AD7450A is provided on this output as a serial data stream.
The bits are clocked out on the falling edge of the SCLK input. The data stream of the AD7450A consists of four leading zeros
followed by the 12 bits of conversion data, which are provided MSB first; the data stream of the AD7440 consists of four
leading zeros, followed by the 10 bits of conversion data, followed by two trailing zeros. In both cases, the output coding is
twos complement.
SCLK
Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This clock input is also used as the
clock source for the conversion process.
V
Power Supply Input. V
is 3 V (+20%/–10%) or 5 V (±5%). This supply should be decoupled to GND with a 0.1 μF capacitor and
DD
DD
a 10 μF tantalum capacitor in parallel.
V
REF
V
IN+
V
IN–
GND
Rev. C | Page 9 of 28
AD7440/AD7450A
V
V
1
8
REF
DD
AD7440/
V
SCLK
2
7
AD7450A
IN+
V
SDATA
3
6
IN–
TOP VIEW
GND
(Not to Scale)
CS
4
5
Figure 6. Pin Configuration for 8-Lead MSOP