NCP380HSN10AGEVB ON Semiconductor, NCP380HSN10AGEVB Datasheet

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NCP380, NCV380 Fixed/Adjustable Current‐ Limiting Power‐Distribution Switches The NCP380 is a high side power-distribution switch designed for applications where heavy capacitive loads and short-circuits are likely to be encountered. The device includes an integrated 55 mW (DFN package), P-channel MOSFET. ...

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USB INPUT fault 100 kW FLAG EN OUT PAD1 ILIM GND FLAG UDFN6 (Top view) Table 1. PIN FUNCTION DESCRIPTION Pin Name Type EN INPUT Enable input, logic low/high ...

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Table 2. MAXIMUM RATINGS Rating From IN to OUT Pins: Input/Output (Note 1) IN, OUT, EN, ILIM, FLAG, Pins: Input/Output (Note 1) FLAG Sink Current I Source Current LIM ESD Withstand Voltage (IEC 61000−4−2) (Output Only, when Bypassed with 1.0 ...

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Table 4. ELECTRICAL CHARACTERISTICS (Min & Max Limits apply for T between −40C to +85C and T A Typical values are referenced +25C and V A Symbol Parameter POWER SWITCH R Static Drain-source On-state DS(on) Resistance DFN ...

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Table 4. ELECTRICAL CHARACTERISTICS (Min & Max Limits apply for T between −40C to +85C and T A Typical values are referenced +25C and V A Symbol Parameter FLAG PIN V FLAG Output Low Voltage OL I ...

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IN Current ILIM* Limiter Vref UVLO TSD GND EN Block EN *For adjustable version only, otherwise not connected. BLOCK DIAGRAM Blocking Control Gate Driver Osc Control Logic and Timer Figure 5. Block Diagram http://onsemi.com 6 OUT Flag /FLAG ...

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Figure 6. T Delay and T Time on rise off fall Figure 7. T Delay and T off fall http://onsemi.com 7 ...

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Figure 8. Turn On a Short T reg TSD Warning TOCP Figure Short on Output. Complete Regulation Sequence http://onsemi.com 8 ...

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T FOCP OUT I IN /FLAG Figure 10. OCP Regulation and TSD Warning Event TOCP T reg Figure 11. Timer Regulation Sequence During 2 W Overload http://onsemi.com 9 TSD Warning ...

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Figure 12. Direct Short on OUT Pin Figure 13. From Timer Regulation to Load Removal Sequence http://onsemi.com 10 ...

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T FOCP V OUT I OUT /FLAG Figure 14. From No Load to Direct Short Circuit T FREV Figure 15. Reverse Voltage Detection http://onsemi.com 11 V REV V OUT V IN /FLAG ...

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T RREV Figure 16. Reverse Voltage Removal 2.4 2.38 2.36 2.34 2.32 2.3 2.28 2.26 UVLO vs. Temperature 2.24 UVLO − hysteresis vs. 2.22 Temperature 2.2 − Temperature (C) Figure 17. Undervoltage Threshold (Falling) and Hysteresis http://onsemi.com 12 ...

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Low−Level Output Supply Current vs Vin −40C 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 2.4 2.9 Figure 18. Standby Current vs Vin High−Level Output Supply Current vs Vin −40C 100 ...

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TSOP Package 100 95 R vs. Temperature DS(on −50 −40 −30 −20 − Temperature (C) Figure 20 Temperature, TSOP Package DS(on) mDFN Package ...

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... NCP380 stays in on-phase/off-phase loop until the over current condition is removed or enable pin is toggled. Remark: Other regulation modes can be available for different ON Semiconductor representative for availability. FLAG Indicator The FLAG pin is an open-drain MOSFET asserted low during over current, reverse-voltage or over temperature OCP conditions ...

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Reverse Voltage Protection When the output voltage exceeds the input voltage by V voltage during T , the reverse voltage circuitry REV REV disconnects the output in order to protect the power supply. The same time T is needed to ...

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Table 5. RESISTOR SELECTION FOR ADJUSTABLE CURRENT LIMIT VERSION Min Current Limit Value Theoric Resistor Value (A) (kW) 0.5 44.2 0.6 37.5 0.7 32.2 0.8 27.7 0.9 24.0 1.0 21.0 1.1 18.5 1.2 16.6 1.3 14.6 1.4 13.0 1.5 11.4 ...

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When the resistor is choosing to fit with the Customer application, the limits of the over current threshold can be calculated with the following formula: IOCP min + 1.6915129 * 0.0330328 ) 0.0000009 (Rlim * 22.375) IOCP max + 2.2885175 ...

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Figure 27. USB Host Typical Application http://onsemi.com 19 ...

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... Evaluation Board Adj. NCP380LSNAJAGEVB 0.5 A NCP380LSN05AGEVB 1.0 A NCP380LSN10AGEVB Adj. NCP380LMUAJAGEVB Adj. NCP380LMUAJAGEVB Low 0.5 A NCP380LMU05AGEVB 1.0 A NCP380LMU10AGEVB 1.5 A NCP380LMU15AGEVB 1.5 A NCP380LMU15AGEVB 2.0 A NCP380LMU20AGEVB Adj. NCP380HSNAJAGEVB 0.5 A NCP380HSN05AGEVB 1.0 A NCP380HSN10AGEVB Adj. NCP380HMUAJAGEVB Adj. NCP380HMUAJAGEVB High 0.5 A NCP380HMU05AGEVB 1.0 A NCP380HMU10AGEVB 1.5 A NCP380HMU15AGEVB 2.0 A NCP380HMU20AGEVB 2.1 A NCP380HMU21AGEVB http://onsemi.com Listed Scheme Package Shipping Y Y TSOP−6 (Pb−Free) ...

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... *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 21 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0 ...

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... SEATING 0.05 PLANE H T *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS TSOP−5 CASE 483−02 ISSUE H NOTES: 1. DIMENSIONING AND TOLERANCING PER 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES ...

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... A 0.05 A1 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “ ...