M24M01-HRMN6TP STMicroelectronics, M24M01-HRMN6TP Datasheet - Page 18

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M24M01-HRMN6TP

Manufacturer Part Number
M24M01-HRMN6TP
Description
IC EEPROM 1MBIT 1MHZ 8SOIC
Manufacturer
STMicroelectronics
Datasheet

Specifications of M24M01-HRMN6TP

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
1M (128K x 8)
Speed
1MHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Device operation
3.10
18/37
Minimizing system delays by polling on ACK
During the internal Write cycle, the device disconnects itself from the bus, and writes a copy
of the data from its internal latches to the memory cells. The maximum Write time (t
shown in
can be used by the bus master.
The sequence, as shown in
Figure 11. Read mode sequences
1. The seven most significant bits of the device select code of a Random Read (in the 1
Current
Address
Read
Random
Address
Read
Sequential
Current
Read
Sequention
Random
Read
be identical.
Initial condition: a Write cycle is in progress.
Step 1: the bus master issues a Start condition followed by a device select code (the
first byte of the new instruction).
Step 2: if the device is busy with the internal Write cycle, no Ack will be returned and
the bus master goes back to Step 1. If the device has terminated the internal Write
cycle, it responds with an Ack, indicating that the device is ready to receive the second
part of the instruction (the first byte of this instruction having been sent during Step 1).
Table
13, but the typical time is shorter. To make use of this, a polling sequence
Dev sel *
Dev sel *
ACK
Dev sel
Dev sel
Data out N
Figure
R/W
R/W
R/W
Doc ID 12943 Rev 7
ACK
ACK
ACK
ACK
R/W
NO ACK
10, is:
Data out 1
Byte addr
Byte addr
Data out
NO ACK
ACK
ACK
ACK
Byte addr
Byte addr
M24M01-R, M24M01-W, M24M01-HR
ACK
ACK
ACK
Data out N
Dev sel *
Dev sel *
NO ACK
R/W
st
ACK
ACK
R/W
and 4
Data out1
Data out
th
bytes) must
NO ACK
AI01105d
w
ACK
) is

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