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MT47H128M8BT-37E:A
MT47H128M8BT-37E:A | |
|---|---|
| Manufacturer Part Number | MT47H128M8BT-37E:A |
| Description | IC DDR2 SDRAM 1GBIT 92FBGA |
| Manufacturer | Micron Technology Inc |
| MT47H128M8BT-37E:A datasheets |
|
Availability: By request
International delivery:
Warranty: 60 days
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Specifications of MT47H128M8BT-37E:A | |||
|---|---|---|---|
| Format - Memory | RAM | Memory Type | DDR2 SDRAM |
| Memory Size | 1G (128M x 8) | Speed | 3.75ns |
| Interface | Parallel | Voltage - Supply | 1.7 V ~ 1.9 V |
| Operating Temperature | 0°C ~ 85°C | Package / Case | 92-FBGA |
| Lead Free Status / RoHS Status | Lead free / RoHS Compliant | ||
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PrevNext
Commands
Truth Tables
The following tables provide a quick reference of available DDR2 SDRAM commands,
including CKE power-down modes and bank-to-bank commands.
Table 36: Truth Table – DDR2 Commands
Notes: 1–3 apply to the entire table
Previous
Function
Cycle
LOAD MODE
H
REFRESH
H
SELF REFRESH entry
H
SELF REFRESH exit
L
Single bank
H
PRECHARGE
All banks PRECHARGE
H
Bank ACTIVATE
H
WRITE
H
WRITE with auto
H
precharge
READ
H
READ with auto
H
precharge
NO OPERATION
H
Device DESELECT
H
Power-down entry
H
Power-down exit
L
1. All DDR2 SDRAM commands are defined by states of CS#, RAS#, CAS#, WE#, and CKE at
Notes:
2. The state of ODT does not affect the states described in this table. The ODT function is
3. “X” means “H or L” (but a defined logic level) for valid I
4. BA2 is only applicable for densities ≥1Gb.
5. An n is the most significant address bit for a given density and configuration. Some larg-
PDF: 09005aef821ae8bf
1GbDDR2.pdf – Rev. T 02/10 EN
CKE
Current
Cycle
CS#
RAS# CAS#
H
L
L
L
H
L
L
L
L
L
L
L
H
H
X
X
L
H
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
X
L
H
H
X
H
X
X
L
H
X
X
L
H
H
H
H
X
X
L
H
H
the rising edge of the clock.
not available during self refresh. See ODT Timing (page 125) for details.
er address bits may be “Don’t Care” during column addressing, depending on density
and configuration.
68
1Gb: x4, x8, x16 DDR2 SDRAM
BA2–
WE#
BA0
An–A11
A10
L
BA
OP code
H
X
X
X
H
X
X
X
X
X
X
X
H
L
BA
X
L
L
X
X
H
H
BA
Row address
L
BA
Column
L
address
L
BA
Column
H
address
H
BA
Column
L
address
H
BA
Column
H
address
H
X
X
X
X
X
X
X
X
X
X
X
H
X
X
X
X
H
measurements.
DD
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2004 Micron Technology, Inc. All rights reserved.
Commands
A9–A0 Notes
4, 6
X
X
X
4, 7
X
6
X
4
Column
4, 5, 6,
address
8
Column
4, 5, 6,
address
8
Column
4, 5, 6,
address
8
Column
4, 5, 6,
address
8
X
X
X
9
X
9
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