CY7C1049BV33-20VC Cypress Semiconductor Corp, CY7C1049BV33-20VC Datasheet

IC SRAM 4MBIT 20NS 36SOJ

CY7C1049BV33-20VC

Manufacturer Part Number
CY7C1049BV33-20VC
Description
IC SRAM 4MBIT 20NS 36SOJ
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1049BV33-20VC

Format - Memory
RAM
Memory Type
SRAM - Asynchronous
Memory Size
4M (512K x 8)
Speed
20ns
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
36-SOJ
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1031
Cypress Semiconductor Corporation
Document #: 38-05139 Rev. **
Features
Functional Description
The CY7C1049BV33 is a high-performance CMOS Static
RAM organized as 524,288 words by 8 bits. Easy memory
expansion is provided by an active LOW Chip Enable (CE), an
Selection Guide
WE
Maximum Access Time (ns)
Maximum Operating Current (mA) Comm’l
Maximum CMOS Standby
Current (mA)
CE
OE
• High speed
• Low active power
• Low CMOS standby power (Commercial L version)
• 2.0V Data Retention (660 µW at 2.0V retention)
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE and OE features
Logic Block Diagram
A
— t
— 504 mW (max.)
— 1.8 mW (max.)
A
A
A
A
A
A
A
A
A
A
0
1
2
3
4
5
6
7
8
9
10
AA
= 15 ns
INPUT BUFFER
DECODER
COLUMN
512K x 8
ARRAY
POWER
DOWN
Ind’l
Com’l/Ind’l
Com’l
L
3901 North First Street
200
220
-12
0.5
12
8
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
0
1
2
3
4
5
6
7
active LOW Output Enable (OE), and three-state drivers. Writ-
ing to the device is accomplished by taking Chip Enable (CE)
and Write Enable (WE) inputs LOW. Data on the eight I/O pins
(I/O
the address pins (A
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing Write
Enable (WE) HIGH. Under these conditions, the contents of
the memory location specified by the address pins will appear
on the I/O pins.
The eight input/output pins (I/O
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE LOW, and WE LOW).
The CY7C1049BV33 is available in a standard 400-mil-wide
36-pin SOJ and 44-pin TSOPII packages with center power
and ground (revolutionary) pinout.
180
200
-15
0.5
15
0
8
GND
through I/O
I/O3
V
I/O
I/O
I/O
WE
CE
CC
A
A
A
A
A
A
A
A
A
A
0
1
2
3
4
0
1
2
5
6
7
8
9
San Jose
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
10
11
12
Top View
7
SOJ
) is then written into the location specified on
170
180
-17
0.5
17
0
512K x 8 Static RAM
8
through A
Pin Configuration
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
CA 95134
NC
A
A
A
A
OE
I/O
I/O
GND
V
I/O
I/O
A
A
A
A
A
NC
18
0
18
17
16
15
CC
14
13
12
11
10
CY7C1049BV33
7
6
5
4
through I/O
).
160
170
Revised February 4, 2002
-20
0.5
20
8
I/O
I/O
V
I/O
I/O
V
WE
CE
CC
A
A
A
A
A
NC
SS
NC
NC
NC
A
A
A
A
A
5
6
7
8
9
0
1
2
3
0
1
2
3
4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
Top View
7
TSOP II
) are placed in a
408-943-2600
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
150
170
-25
0.5
25
8
A
A
A
A
NC
NC
NC
NC
OE
I/O
I/O
V
V
I/O
I/O
A
A
A
A
A
NC
NC
17
16
15
18
SS
CC
14
13
12
11
10
7
6
5
4

Related parts for CY7C1049BV33-20VC

CY7C1049BV33-20VC Summary of contents

Page 1

... The eight input/output pins (I/O high-impedance state when the device is deselected (CE HIGH), the outputs are disabled (OE HIGH), or during a write operation (CE LOW, and WE LOW). The CY7C1049BV33 is available in a standard 400-mil-wide 36-pin SOJ and 44-pin TSOPII packages with center power and ground (revolutionary) pinout. A ...

Page 2

... Ind’ > > < MAX , Com’l/Ind’l CC – 0.3V, CC Com’l L > V – 0.3V < 0.3V CY7C1049BV33 [1] –0. 0.5V CC Ambient [2] Temperature 3.3V ± 0.3V 0°C to +70°C –40°C to +85°C -12 -15 -17 Max. Min. Max. Min. 2.4 2.4 0.4 0.4 V 2.2 V 2.2 ...

Page 3

... CC Com’ > V – 0.3V < 0.3V Test Conditions T = 25° MHz 3.3V CC VENIN EQUIVALENT 3.3V 167Ω 1.73V (b) GND RiseTime:1 V/ns CY7C1049BV33 -20 -25 Min. Max. Min. Max. 2.4 2.4 0.4 0.4 2 0 –0.5 0.8 –0.5 0.8 –1 +1 –1 +1 – ...

Page 4

... The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the write. 9. The minimum write cycle time for Write Cycle No. 3 (WE controlled, OE LOW) is the sum of t Document #: 38-05139 Rev. ** [4] Over the Operating Range -12 Min. Max. [ less than less than t HZCE LZCE HZOE LZOE CY7C1049BV33 -15 -17 Min. Max. Min. Max ...

Page 5

... No input may exceed V + 0.5V CC 11. .t < for the -12 and -15 speeds. t < for the -20 ns and slower speeds Document #: 38-05139 Rev. ** [4] Over the Operating Range (continued) Description [6] Over the Operating Range (For L version only) Description Conditions > > CY7C1049BV33 -20 -25 Min. Max. Min. Max ...

Page 6

... WE is HIGH for read cycle. 14. Address valid prior to or coincident with CE transition LOW. Document #: 38-05139 Rev. ** DATA RETENTION MODE 3.0V V > CDR OHA ACE t DOE t LZOE 50 CY7C1049BV33 3. DATA VALID t HZOE t HZCE IMPEDANCE DATA VALID t PD 50% 1049BV33-5 1049BV33–6 HIGH 1049BV33–7 Page ...

Page 7

... During this period the I/Os are in the output state and input signals should not be applied. Document #: 38-05139 Rev. ** [15, 16 SCE PWE t SD DATA [16 SCE PWE t HZWE – I/O Mode 0 7 Power-Down Read Write Selected, Outputs Disabled CY7C1049BV33 VALID DATA VALID t LZWE Power Standby (I SB Active ( Active ( Active ( 1049BV33–8 1049BV33-9 ) Page ...

Page 8

... CY7C1049BV33-12ZC CY7C1049BV33L-12VC CY7C1049BV33-12VI 15 CY7C1049BV33-15VC CY7C1049BV33L-15VC CY7C1049BV33-15ZC CY7C1049BV33L-15ZC CY7C1049BV33-15VI CY7C1049BV33-15ZI 17 CY7C1049BV33-17VC CY7C1049BV33L-17VC CY7C1049BV33-17ZC CY7C1049BV33L-17ZC CY7C1049BV33-17VI CY7C1049BV33L-17VI CY7C1049BV33-17ZI 20 CY7C1049BV33-20VC CY7C1049BV33L-20VC CY7C1049BV33-20ZC CY7C1049BV33L-20ZC CY7C1049BV33-20VI CY7C1049BV33-20ZI 25 CY7C1049BV33-25VC CY7C1049BV33L-25VC CY7C1049BV33-25ZC CY7C1049BV33L-25ZC CY7C1049BV33-25VI Document #: 38-05139 Rev. ** Package Name Package Type V36 36-Lead (400-Mil) Molded SOJ Z44 44-Pin TSOP II Z44 ...

Page 9

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 36-Lead (400-Mil) Molded SOJ V36 44-Pin TSOP II Z44 CY7C1049BV33 51-85090-B 51-85087-A Page ...

Page 10

... Document Title: CY7C1049BV33 512K x 8 Static RAM Document Number: 38-05139 Issue REV. ECN NO. Date ** 113091 02/13/02 Document #: 38-05139 Rev. ** Orig. of Change DSG Change from Spec number: 38-00931 to 38-05139 CY7C1049BV33 Description of Change Page ...

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