CY7C199C-20ZXIT Cypress Semiconductor Corp, CY7C199C-20ZXIT Datasheet
CY7C199C-20ZXIT
Specifications of CY7C199C-20ZXIT
Related parts for CY7C199C-20ZXIT
CY7C199C-20ZXIT Summary of contents
Page 1
... The device features an automatic power-down feature that significantly reduces power consumption when deselected. See the Truth Table in this data sheet for a complete description of read and write modes. The CY7C199C is available in 28 DIP, 28 SOJ, and 28 TSOP I package(s). Input Buffer RAM Array Power ...
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... Pin Layout and Specifications Document #: 38-05408 Rev DIP (6.9 x 35.6 x 3.5 mm) – P21 TSOP 13.4 mm) – Z28 SOJ – V21 CY7C199C I/O 7 I/O 6 I/O 5 I I/O 7 I/O 6 I/O 5 I/O 4 I/O 3 Page ...
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... Supply Power (5.0V Supply Ground SS WE Control Write Enable Truth Table Document #: 38-05408 Rev. *B Description 10, 21, 23, 24, 25, 26 11, 12, 13, 15, 16, 17, 18, 19 CY7C199C DIP SOJ TSOP 10, 21, 23, 10, 11, 12, 13, 24, 25, 26 14, 15, 16, 17 11, 12, 13, 15, 18, 19, 20, 22, 16, 17, 18, 19 23, 24, 25, 26 ...
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... Over the Operating Range (–20, –25) Condition = Min –4 Min 8 Max mA OUT MAX 1 ≥ V ≥ V Max ≤ MAX CY7C199C Value –65 to +150 –55 to +125 –0.5 to +7.0 –0 0 > 2001 > 200 ) Voltage Range (V A 5.0V ± 10% 5.0V ± 10% [ Power Min. Max. Min. – 2 2.2 CC 0.3 – ...
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... 90 10 Rise Time 1 V/ns * including scope and jig capacitance Description Capacitor 1 Capacitor 2 Resistor 1 Resistor 2 Resistor 3 Resistor 4 Resistor Thevenin Voltage Thevenin CY7C199C [2] (continued Power Min. Max. Min. Max. – – 10 – – 500 – – –5 +5 –5 – –5 +5 –5 Max. ...
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... Condition =2.0V, CE ≥ – 0.3V ≤ 0.3V – 0. less than less than t HZCE LZCE HZOE CY7C199C SOJ DIP 79 TBD 41.42 TBD Max Min Max Min – 20 – – 20 – – 3 – – 20 – 7 – ...
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... WE is HIGH for Read Cycle. 11. This cycle is OE Controlled and WE is HIGH read cycle. 12. Address valid prior to or coincident with CE transition LOW. Document #: 38-05408 Rev. *B DATA RETENTION MODE OHA t ACE t DOE t LZOE t LZCE t PU 50% = CE. CY7C199C t R Data Valid HZOE Data Valid t HZCE High 50% Page ...
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... During this period the I/Os are in output state and input signals should not be applied. 16. This cycle is CE controlled. 17 goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state. Document #: 38-05408 Rev SCE HZOE Data-In Valid CY7C199C PWE SCE Data-In Valid High Z Page ...
Page 9
... Write Cycle No. 3 (WE Controlled, OE Low) Address Data Undefined In/Out see footnotes Note: 18. The cycle is WE controlled, OE LOW. The minimum write cycle time is the sum of t Document #: 38-05408 Rev. *B [18 SCE PWE t SD Data-In Valid t HZWE and t . HZWE SD CY7C199C Undefined See Footnotes t LZWE Page ...
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... CY7C199C–15ZXC 15 ns CY7C199C–15VI 15 ns CY7C199C–15VXI 15 ns CY7C199CL–15VC 15 ns CY7C199CL–15VXC 15 ns CY7C199CL–15ZC 15 ns CY7C199CL–15ZXC 15 ns CY7C199CL–15VI 15 ns CY7C199CL–15VXI 20 ns CY7C199C–20VC 20 ns CY7C199C–20VXC 20 ns CY7C199C–20ZI 20 ns CY7C199C–20ZXI 25 ns CY7C199C–25PC 25 ns CY7C199C– ...
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... Package Diagram 28-Lead Thin Small Outline Package Type 13.4 mm) Z28 Document #: 38-05408 Rev. *B CY7C199C 51-85071-*G Page ...
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... SEATING PLANE 1.345[34.16] 1.385[35.18] 0.120[3.05] 0.140[3.55] 0.015[0.38] 0.060[1.52] 0.055[1.39] 0.065[1.65] 0.015[0.38] 0.020[0.50] SEE LEAD END OPTION LEAD END OPTION CY7C199C A DETAIL EXTERNAL LEAD DESIGN 0.026 0.032 0.013 0.014 0.019 0.020 OPTION 1 OPTION 2 0.007 0.013 0.262 0.272 51-85031-*B DIMENSIONS IN INCHES [MM] MIN. ...
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... Document History Page Document Title: CY7C199C 256K (32K x 8) Static RAM Document Number: 38-05408 Issue REV. ECN No. Date ** 129233 09/11/03 *A 129697 09/15/03 *B 341574 See ECN Document #: 38-05408 Rev. *B Orig. of Change Description of Change HGK New Data Sheet KKV Minor change: Move Product Portfolio from page 4 to page 1 ...