M95640-WMN6P STMicroelectronics, M95640-WMN6P Datasheet - Page 21

• Manufacturer Part Number: M95640-WMN6P
• Description: IC EEPROM 64KBIT 10MHZ 8SOIC
• Manufacturer: STMicroelectronics

Specifications of M95640-WMN6P

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 64K (8K x 8)
• Speed: 10MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Organization: 8 K x 8
• Interface Type: SPI
• Maximum Clock Frequency: 10 MHz
• Access Time: 40 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.5 V
• Maximum Operating Current: 4 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3.3 V, 5 V
• Memory Configuration: 8192 X 8
• Clock Frequency: 10MHz
• Supply Voltage Range: 2.5V To 5.5V
• Memory Case Style: SOIC
• No. Of Pins: 8
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-8615-5; M95640-WMN6P

M95320, M95320-W, M95320-R
6.5
Figure 10. Write Status Register (WRSR) sequence
Read from Memory Array (READ)
As shown in
low. The bits of the instruction byte and address bytes are then shifted in, on Serial Data
Input (D). The address is loaded into an internal address register, and the byte of data at
that address is shifted out, on Serial Data Output (Q).
If Chip Select (S) continues to be driven low, the internal address register is automatically
incremented, and the byte of data at the new address is shifted out.
When the highest address is reached, the address counter rolls over to zero, allowing the
Read cycle to be continued indefinitely. The whole memory can, therefore, be read with a
single READ instruction.
The Read cycle is terminated by driving Chip Select (S) high. The rising edge of the Chip
Select (S) signal can occur at any time during the cycle.
The first byte addressed can be any byte within any page.
The instruction is not accepted, and is not executed, if a Write cycle is currently in progress.
Figure 11. Read from Memory Array (READ) sequence
1. Depending on the memory size, as shown in
S
C
D
Q
S
C
D
Q
0
Figure
1
High Impedance
2
Instruction
3
11, to send this instruction to the device, Chip Select (S) is first driven
4
0
5
1
High Impedance
6
2
Instruction
Doc ID 5711 Rev 12
7
3
MSB
15
8
4
14 13
9 10
5
16-Bit Address
Table
6
7
MSB
6, the most significant address bits are Don’t Care.
3
20 21 22 23 24 25 26 27
7
8
2
6
9 10 11 12 13 14 15
1
5
Register In
0
4
Status
MSB
7
3
6
2
5
1
Data Out 1
4
0
3
28 29 30
AI02282D
2
1
31
0
Instructions
7
Data Out 2
AI01793D
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