EPCS64SI16N Altera, EPCS64SI16N Datasheet - Page 36

• Manufacturer Part Number: EPCS64SI16N
• Description: IC CONFIG DEVICE 64MBIT 16-SOIC
• Manufacturer: Altera
• Series: EPCSr

Specifications of EPCS64SI16N

• Programmable Type: In System Programmable
• Memory Size: 64Mb
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-SOIC (0.300", 7.50mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-1380-5; EPCS64SI16; EPCS64SI16N

3–36
Table 3–25. Chapter Revision History (Part 2 of 3)
Configuration Handbook (Complete Two-Volume Set)
August 2007
April 2007
January 2007
October 2006
August 2005
August 2005
February 2005
Date
Version
3.0
2.0
1.7
1.6
1.5
1.4
1.3
Chapter 3: Serial Configuration Devices (EPCS1, EPCS4, EPCS16, EPCS64, and EPCS128) Data Sheet
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Updated “Introduction” section.
Updated “Functional Description” section.
Updated Table 4–1 through Table 4–4 and Table 4–7 through Table 4–9 to with
EPCS128 information.
Added Table 4–6 on Arria GX.
Added notes to Figure 4–3.
Added notes to Figure 4–4.
Updated Table 4–10 with EPCS128 information.
Added new Table 4–11 on address range for sectors in EPCS128 device.
Updated Table 4–16 with information about “Read Device Identification” and added
Added new Table 4–21 on block protection bits in EPCS128.
Added notes to Figure 4–12.
Added new section “Read Device Identification Operation” with Table 4–23 and
Figure 4–13.
Updated “Write Bytes Operation”, “Erase Bulk Operation” and “Erase Sector
Operation” sections.
Updated Table 4–24 to include EPCS128 information.
Updated (Note 1) to Table 4–26.
Updated VCC and VI information to include EPCS128 in Table 4–27.
Updated VIH information to include EPCS128 in Table 4–29.
Updated ICC0 and ICC1 information to include EPCS128 in Table 4–30.
Updated Figure 4–21 and Table 4–34 with EPCS128 information.
Updated “Introduction” section.
Updated “Functional Description” section and added handpara note.
Added Table 4–4, Table 4–6, and Table 4–7.
Updated “Active Serial FPGA Configuration” section and its handpara note.
Added notes to Figure 4–2.
Updated Table 4–26 and added (Note 1).
Updated Figure 4–20.
Updated Table 4–34.
Removed reference to PLMSEPC-16 in “Programming and Configuration File
Support”.
Updated DCLK pin information in Table 4–32.
Updated Figure 4–19.
Updated Table 4–30 and Table 4–32.
Updated table 4-4 to include EPCS64 support for Cyclone devices.
Updated tables.
Minor text updates.
Updated hot socketing AC specifications.
(Note 5).
Changes Made
© December 2009
Chapter Revision History
Altera Corporation