DP8422AV-20 National Semiconductor, DP8422AV-20 Datasheet - Page 34

IC CTRLR/DVR CMOS PROGRAM 84PLCC

DP8422AV-20

Manufacturer Part Number
DP8422AV-20
Description
IC CTRLR/DVR CMOS PROGRAM 84PLCC
Manufacturer
National Semiconductor
Datasheet

Specifications of DP8422AV-20

Controller Type
Dynamic RAM (DRAM)
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
84-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
*DP8422AV-20

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0
7 0 RAS and CAS Configuration Modes
7 4 ERROR SCRUBBING
In error scrubbing during refresh the user selects one two
or four RAS and CAS outputs per bank When performing
error detection and correction memory is always accessed
FIGURE 29a DRAM Array Setup for 4 Banks Using Error Scrubbing (C6 C5 C4
FIGURE 29b DRAM Array Setup for Error Scrubbing with 2 Banks (C6 C5 C4
FIGURE 28a DRAM Array Setup for 4 Banks Using Address Pipelining (C6 C5 C4
FIGURE 28b DRAM Array Setup for Address Pipelining with 2 Banks (C6 C5 C4
or C6 C5 C4
or C6 C5 C4
e
e
0 1 0 (Also Allowing Error Scrubbing) during Programming)
0 0 1 (Also Allowing Error Scrubbing) during Programming)
34
(Continued)
as words Since the CAS signals are not used to select
individual bytes the ECAS inputs can be tied low as shown
in Figures 29a and 29b
e
e
0 0 1 during Programming)
0 1 0 during Programming)
TL F 8588 – D4
e
e
TL F 8588 – D5
1 0 1
1 1 1
TL F 8588 – D7
TL F 8588– D6

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