IC SWIT PWM SMPS CM POWERSO10

VIPER100ASPTR-E

Manufacturer Part NumberVIPER100ASPTR-E
DescriptionIC SWIT PWM SMPS CM POWERSO10
ManufacturerSTMicroelectronics
SeriesVIPER™
VIPER100ASPTR-E datasheet
 


Specifications of VIPER100ASPTR-E

Output IsolationIsolatedFrequency Range90 ~ 200kHz
Voltage - Input8 ~ 15 VVoltage - Output700V
Power (watts)82WOperating Temperature25°C ~ 125°C
Package / CasePowerSO-10 Exposed Bottom PadNumber Of Outputs1
Output Voltage700 V (Min)Output Current3000 mA
Mounting StyleSMD/SMTSwitching Frequency90 KHz to 110 KHz
Fall Time100 nsRise Time50 ns
Synchronous PinNoLead Free Status / RoHS StatusLead free / RoHS Compliant
Other names497-6163-2  
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VIPer100A-E/ASP-E
V
is the voltage hysteresis of the UVLO logic (refer to the minimum specified value).
DDhyst
The soft start feature can be implemented on the COMP pin through a simple capacitor which
will be also used as the compensation network. In this case, the regulation loop bandwidth is
rather low, because of the large value of this capacitor. In case a large regulation loop
bandwidth is mandatory, the schematics of
performance compensation network together with a separate high value soft start capacitor.
Both soft start time and regulation loop bandwidth can be adjusted separately.
If the device is intentionally shut down by tying the COMP pin to ground, the device is also
performing start-up cycles, and the V
This voltage can be used for supplying external functions, provided that their consumption does
not exceed 0.5mA.
(see Figure 18)
shutdown. Once the "Shutdown" signal has been activated, the device remains in the Off state
until the input voltage is removed.
5.4
Transconductance Error Amplifier
The VIPer100A-E/ASP-E includes a transconductance error amplifier. Transconductance Gm is
the change in output current (I
l
COMP
G
=
------------------ -
m
V
DD
The output impedance Z
V
CO MP
Z
=
-------------------- -
CO MP
I
COMP
This last equation shows that the open loop gain A
A
= G
x Z
VOL
m
COMP
where G
value for VIPer100A-E/ASP-E is 1.5 mA/V typically.
m
G
is defined by specification, but Z
m
An impedance Z can be connected between the COMP pin and ground in order to define the
transfer function F of the error amplifier more accurately, according to the following equation
(very similar to the one above):
F
= Gm x Z(S)
(S)
The error amplifier frequency response is reported in
resistance connected on the COMP pin. The unloaded transconductance error amplifier shows
an internal Z
of about 330K . More complex impedance can be connected on the COMP
COMP
pin to achieve different compensation level. A capacitor will provide an integrator function, thus
eliminating the DC static error, and a resistance in series leads to a flat gain at higher
frequency, insuring a correct phase margin. This configuration is illustrated in
As shown in
Figure 19
avoid any high frequency interference.
Is also possible to implement a slope compensation when working in continuous mode with
duty cycle higher than 50%.
classical compensation network, and Q1 is injecting the slope compensation with the correct
polarity from the oscillator sawtooth.
(see Figure 17)
voltage is oscillating between V
DD
shows a typical application of this function, with a latched
) versus change in input voltage (V
COMP
at the output of this amplifier (COMP pin) can be defined as:
COMP
V
1
COMP
=
------- -
------------------------ -
G
V
m
DD
VOL
and therefore A
COMP
an additional noise filtering capacitor of 2.2nF is generally needed to
Figure 21
shows such a configuration. Note: R1 and C2 build the
5 Operation Description
can be used. It mixes a high
and V
DDon
DDoff
). Thus:
DD
can be related to G
and Z
m
COMP
are subject to large tolerances.
VOL
Figure 10.
for different values of a simple
Figure 20
.
:
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