TC820CLW Microchip Technology, TC820CLW Datasheet - Page 10

IC ADC 3 3/4DGT LGC PROBE 44PLCC

TC820CLW

Manufacturer Part Number
TC820CLW
Description
IC ADC 3 3/4DGT LGC PROBE 44PLCC
Manufacturer
Microchip Technology
Datasheet

Specifications of TC820CLW

Display Type
LCD
Configuration
7 Segment + 2 Annunciators
Digits Or Characters
A/D 3.75 Digits
Current - Supply
1mA
Voltage - Supply
9V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Interface
-

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TC820CLW
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Quantity:
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TC820
3.2.3
Upon completion of the auto-zero phase, the auto-zero
loop is opened and the internal differential inputs
connect to V
then integrated for a fixed time period, which is 2000
counts (4000 clock periods). The externally set clock
frequency is divided by two before clocking the internal
counters.
The integration time period is:
EQUATION 3-3:
The differential input voltage must be within the
device's Common mode range when the converter and
measured system share the same power supply
common (ground). If the converter and measured
system do not share the same power supply common,
as in battery powered applications, V
to analog common.
Polarity is determined at the end of signal integration
phase. The sign bit is a "true polarity" indication, in that
signals less than 1LSB are correctly determined. This
allows precision null detection that is limited only by
device noise and auto-zero residual offsets.
3.2.4
The reference capacitor, which was charged during the
auto-zero phase, is connected to the input of the
integrating amplifier. The internal sign logic ensures the
polarity of the reference voltage is always connected in
the phase opposite to that of the input voltage. This
causes the integrator to ramp back to zero at a constant
rate, determined by the reference potential.
The amount of time required (t
amplifier to reach zero is directly proportional to the
amplitude of the voltage that was put on the integrating
capacitor (V
EQUATION 3-4:
The digital reading displayed by the TC820 is:
DS21476C-page 10
Digital Count = 2000
SIGNAL INTEGRATION PHASE
REFERENCE INTEGRATE
(DE-INTEGRATE) PHASE
INT
IN
+ and V
) during the integration phase.
t
DEINT
t
INT
IN
=
-. The differential input signal is
=
R
INT
F
4000
OSC
V
C
DEINT
REF
INT
V
V
IN
V
INT
) for the integrating
+V
REF
IN
- should be tied
IN
-
The oscillator frequency is divided by 2 prior to clock-
ing the internal decade counters. The four-phase
measurement cycle takes a total of 8000 (4000) counts
or 16,000 clock pulses. The 8000 count phase is
independent of input signal magnitude or polarity.
Each phase of the measurement cycle has the follow-
ing length:
TABLE 3-2:
3.2.5
When the analog input is greater than full scale, the
LCD will display "OL" and the "OVER RANGE" LCD
annunciator will be on.
3.2.6
The TC820 provides the capability of holding the high-
est (or peak) reading. Connecting the PK HOLD input
to V
each conversion, the contents of the TC820 counter
are compared to the contents of the display register. If
the new reading is higher than the reading being
displayed, the higher reading is transferred to the
display register. A "higher" reading is defined as the
reading with the higher absolute value.
The peak reading is held in the display register, so the
reading will not "droop" or slowly decay with time. The
held reading will be retained until a higher reading
occurs, the PK HOLD input is disconnected from V
or power is removed.
The peak signal to be measured must be present
during the TC820 signal integrate period. The TC820
does not perform transient peak detection of the analog
input signal. However, in many cases, such as measur-
ing temperature or electric motor starting current, the
TC820 "acquisition time" will not be a limitation. If true
peak detection is required, a simple circuit will suffice.
See the applications section for details.
1) Auto-Zero
2) Signal Integrate (Notes 1, 2)
3) Reference Integrate
4) Integrator Output Zero
Note 1:
DD
Conversion Phase
2:
enables the peak hold feature. At the end of
This time period is fixed. The integration
period for theTC820 is:
INT (TC820) = 4000/F
Where F
frequency.
Times shown are the RANGE/FREQ at
logic low (normal operation). When
RANGE/FREQ is logic high, signal
integrate times are 200 counts. See
Section 3.2.7 “10:1 Range Change”.
INPUT OVER RANGE
PEAK READING HOLD
MEASUREMENT CYCLE
PHASE LENGTH
OSC
© 2007 Microchip Technology Inc.
is the clock oscillator
OSC
499 to 4499
= 2000 counts.
1 to 4001
Counts
1500
2000
DD
,

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