TC820CLW Microchip Technology, TC820CLW Datasheet - Page 21

IC ADC 3 3/4DGT LGC PROBE 44PLCC

TC820CLW

Manufacturer Part Number
TC820CLW
Description
IC ADC 3 3/4DGT LGC PROBE 44PLCC
Manufacturer
Microchip Technology
Datasheet

Specifications of TC820CLW

Display Type
LCD
Configuration
7 Segment + 2 Annunciators
Digits Or Characters
A/D 3.75 Digits
Current - Supply
1mA
Voltage - Supply
9V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Interface
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TC820CLW
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
TC820CLW713
Manufacturer:
Microchip Technology
Quantity:
10 000
FIGURE 5-11:
Probe.
5.11
The TC820 will hold the highest A/D conversion or
frequency reading indefinitely when the PKHOLD input
is connected to V
must be present during the A/D converter's signal
integrate period. For slowly changing signals, such as
temperature, the peak reading will be properly
converted and held.
If rapidly changing analog signals must be held, an
external peak detector should be added. An inexpensive
circuit can be made from an op amp and a few discrete
components, as shown in
the external peak detector should be adjusted so that the
held voltage will not decay below the desired accuracy
level during the converter's 400 ms conversion time.
FIGURE 5-12:
5.12
The TC820 drives a triplex (multiplexed 3:1) LCD with
three backplanes. The LCD can include decimal points,
polarity sign, and annunciators for over range, peak
hold, high and low logic levels, and low battery.
© 2007 Microchip Technology Inc.
V
Probe Input
IN
Note: Select R1, R2, R3 for desired logic thresholds.
Logic
10kΩ
+
TL061
1MΩ
1MΩ
External Peak Detection
Liquid Crystal Display (LCD)
DD
R2
R1
R3
Offset Null
V
V
. However, the analog peak input
H
L
1N4148
Window Comparator Logic
External Peak Detector.
+
+
Figure
0.01µF
TC820
+9V
1N4148
1N4148
5-12. The droop rate of
+9V
V
PKHOLD
V
DD
IN
V
LOGIC
DP1/HI
DP0/LO
DGND
TC820
V
+
DD
SS
0V
Table 5-2
segments to the backplanes and segment drive lines.
The backplane drive frequency is obtained by dividing
the oscillator frequency by 240.
Backplane waveforms are shown in
appear on outputs BP1, BP2, and BP3. They remain the
same, regardless of the segments being driven.
FIGURE 5-13:
Other display output lines have waveforms that vary
depending on the displays values.
set of waveforms for the a, g, d outputs of one digit for
several combinations of "on" segments.
FIGURE 5-14:
Waveforms.
BP1
BP2
BP3
a Segment
Segment
d, g OFF
a, g ON
All OFF
d OFF
All ON
Line
ON
shows the assignment of the display
Backplane Waveforms.
Typical Display Output
Figure 5-13
Figure
DS21476C-page 21
TC820
5-13. These
shows a
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
DD
H
L
DISP
DD
H
L
DISP
DD
H
L
DISP
DD
H
L
DISP

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