LTC4211IS8 Linear Technology, LTC4211IS8 Datasheet - Page 23

• Manufacturer Part Number: LTC4211IS8
• Description: IC CTRLR HOTSWAP CURR CTRL 8SOIC
• Manufacturer: Linear Technology
• Type: Hot-Swap Controllerr

Specifications of LTC4211IS8

• Applications: General Purpose
• Internal Switch(s): No
• Voltage - Supply: 2.5 V ~ 16.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

OPERATIO
The R
to make its drain-source voltage (V
of V
error at the output voltage. This restricts the choice of
MOSFETs to very low R
V
package dissipation (P
R
used with the LTC4211.
For reliable circuit operation, the maximum junction tem-
perature (T
the manufacturer’s recommended value. This includes
normal mode operation, start-up, current-limit and
autoretry mode in a fault condition. Under normal condi-
tions the junction temperature of a power MOSFET is given
by Equation 13:
where
If a short circuit happens during start-up, the external
MOSFET can experience a big single pulse energy. This is
especially true if the applications only employed a small
gate capacitor or no gate capacitor at all. Consult the safe
operating area (SOA) curve of the selected MOSFET to
ensure that the T
USING STAGGERED PIN CONNECTORS
The LTC4211 can be used on either a printed circuit board
or on the backplane side of the connector, and examples
for both are shown in Figures 13 and 14. Printed circuit
board edge connectors with staggered pins are recom-
mended as the insertion and removal of circuit boards do
sequence the pin connections. Supply voltage and ground
connections on the printed circuit board should be wired
to the edge connector’s long pins or blades. Control and
status signals (like RESET, FAULT and ON) passing through
the card’s edge connector should be wired to short length
pins or blades.
DS
DS(ON)
MOSFET Junction Temperature,
T
P
θ
T
CC
J(MAX)
JA
A(MAX)
D
requirement can be relaxed in which case MOSFET
DS(ON)
= (I
. At a V
= junction-to-ambient thermal resistance
. Table 5 lists some power MOSFETs that can be
LOAD
≤ T
J(MAX)
= maximum ambient temperature
of the external pass transistor should be low
CC
A(MAX)
)
2
= 2.5V, V
• R
) for a power MOSFET should not exceed
J(MAX)
U
DS(ON)
+ θ
DS(ON)
D
is not exceeded during start-up.
JA
and T
DS
• P
+ V
. At higher V
D
J
RSENSE
) may limit the value of
DS
) a small percentage
= 0.1V yields 4%
CC
voltages, the
(13)
PCB CONNECTION SENSE
There are a number of ways to use the LTC4211’s ON pin
to detect whether the printed circuit board has been fully
seated in the backplane before the LTC4211 commences
a start-up cycle.
The first example is shown in the schematic on the front
page of this data sheet. In this case, the LTC4211 is
mounted on the PCB and a 20k/10k resistive divider is
connected to the ON pin. On the edge connector, R1 is
wired to a short pin. Until the connectors are fully mated,
the ON pin is held low, keeping the LTC4211 in an OFF
state. Once the connectors are mated, the resistive divider
is connected to V
begins a start-up cycle.
In Figure 13, an LTC4211 is illustrated in a basic configu-
ration on a PCB daughter card. The ON pin is connected to
V
the card is seated into the backplane. R2 bleeds off any
potential static charge which might exist on the backplane,
the connector or during card installation.
A third example is shown in Figure 14 where the LTC4211
is mounted on the backplane. In this example, a 2N2222
transistor and a pair of resistors (R4, R5) form the PCB
connection sense circuit. With the card out of the chassis,
Q2’s base is biased to V
driving the LTC4211’s ON pin low. The base of Q2 is also
wired to a socket on the backplane connector. When a card
is firmly seated into the backplane, the base of Q2 is then
grounded through a short pin connection on the card. Q2
is biased OFF, the LTC4211’s ON pin is pulled-up to V
and a start-up cycle begins.
In the previous three examples, the connection sense was
hard wired with no processor (low) interrupt capability. As
illustrated in Figure 15, the addition of an inexpensive
logic-level discrete MOSFET and a couple of resistors
offers processor interrupt control to the connection sense.
R4 keeps the gate of M2 at V
mated to the backplane. A logic low for the ON/OFF signal
turns M2 OFF, allows the ON pin to pull high and turns on
the LTC4211.
CC
on the backplane through a 10k pull-up resistor once
CC
, V
CC
ON
through R5, biasing Q2 ON and
> 1.316V and the LTC4211
CC
until the card is firmly
LTC4211
23
4211fa
CC