LM3421MH/NOPB National Semiconductor, LM3421MH/NOPB Datasheet - Page 14

• Manufacturer Part Number: LM3421MH/NOPB
• Description: IC LED DRVR HP CONS CURR 16TSSOP
• Manufacturer: National Semiconductor
• Series: PowerWise®r
• Type: High Power, Constant Currentr

Specifications of LM3421MH/NOPB

• Constant Current: Yes
• Topology: PWM, SEPIC, Step-Down (Buck), Step-Up (Boost)
• Number Of Outputs: 1
• Internal Driver: No
• Type - Primary: Automotive
• Type - Secondary: High Brightness LED (HBLED)
• Frequency: 2MHz
• Voltage - Supply: 4.5 V ~ 75 V
• Voltage - Output: 3 V ~ 72 V
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP Exposed Pad, 16-eTSSOP, 16-HTSSOP
• Operating Temperature: -40°C ~ 125°C
• Current - Output / Channel: 1A
• Internal Switch(s): No
• Efficiency: 95%
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *LM3421MH/NOPB; LM3421MH

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CONTROL LOOP COMPENSATION
The LM3421/23 control loop is modeled like any current mode
controller. Using a first order approximation, the uncompen-
sated loop can be modeled as a single pole created by the
output capacitor and, in the boost and buck-boost topologies,
a right half plane zero created by the inductor, where both
have a dependence on the LED string dynamic resistance.
There is also a high frequency pole in the model, however it
is near the switching frequency and plays no part in the com-
pensation design process therefore it will be neglected. Since
ceramic capacitance is recommended for use with LED
drivers due to long lifetimes and high ripple current rating, the
ESR of the output capacitor can also be neglected in the loop
analysis. Finally, there is a DC gain of the uncompensated
loop which is dependent on internal controller gains and the
external sensing network.
A buck-boost regulator will be used as an example case. See
the Design Guide section for compensation of all topologies.
The uncompensated loop gain for a buck-boost regulator is
given by the following equation:
Where the uncompensated DC loop gain of the system is de-
scribed as:
And the output pole (ω
P1
) is approximated:
FIGURE 9. Compensation Circuitry
14
And the right half plane zero (ω
Figure 8
scenario when the RHP zero is below the output pole. This
occurs at high duty cycles when the regulator is trying to boost
the output voltage significantly. The RHP zero adds 20dB/
decade of gain while loosing 45°/decade of phase which
places the crossover frequency (when the gain is zero dB)
extremely high because the gain only starts falling again due
to the high frequency pole (not modeled or shown in figure).
The phase will be below -180° at the crossover frequency
which means there is no phase margin (180° + phase at
crossover frequency) causing system instability. Even if the
output pole is below the RHP zero, the phase will still reach
-180° before the crossover frequency in most cases yielding
instability.
FIGURE 8. Uncompensated Loop Gain Frequency
shows the uncompensated loop gain in a worst-case
Response
Z1
) is:
300673a3
300673a7