LM3503SQ-35/NOPB National Semiconductor, LM3503SQ-35/NOPB Datasheet - Page 3

• Manufacturer Part Number: LM3503SQ-35/NOPB
• Description: IC LED DRIVER WHTE BCKLGT 16-LLP
• Manufacturer: National Semiconductor
• Series: PowerWise®r
• Type: Backlight, White LEDr

Specifications of LM3503SQ-35/NOPB

• Constant Current: Yes
• Topology: PWM, Step-Up (Boost)
• Number Of Outputs: 2
• Internal Driver: Yes
• Type - Primary: Backlight
• Type - Secondary: White LED
• Frequency: 800kHz ~ 1.2MHz
• Voltage - Supply: 2.5 V ~ 5.5 V
• Voltage - Output: 33 V ~ 34 V
• Mounting Type: Surface Mount
• Package / Case: 16-LLP
• Operating Temperature: -40°C ~ 85°C
• Current - Output / Channel: 750mA
• Internal Switch(s): Yes
• Efficiency: 80%
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LM3503SQ-35; LM3503SQ-35NOPB; LM3503SQ-35NOPBTR; LM3503SQ-35NOPBTR; LM3503SQ-35TR

Bump #
Pin Descriptions/Functions
Cntrl (Bump A1): White LED current control pin. Use this
pin to control the feedback voltage with an external DC
voltage.
Fb (Bump B1):Output voltage feedback connection.
V
and NMOS FET switches (Figure 1: P1 and N2). It is recom-
mended to connect 100nF at V
LM3503-35V & LM3503-44V versions.
V
Source connection of the internal PMOS FET switch (Figure
1: P1) and OVP sensing node. The output capacitor must be
connected as close to the device as possible, between the
V
diode as close as possible to the V
resistance and EMI radiation.
Sw (Bump D2):
Drain connection of the internal power NMOS FET switch
(Figure 1: N1). Minimize the metal trace length and maxi-
mize the metal trace width connected to this pin to reduce
EMI radiation and trace resistance.
Pgnd (Bump D3): Power ground pin. Connect directly to the
ground plane.
Agnd (Bump C3):Analog ground pin. Connect the analog
ground pin directly to the Pgnd pin.
OUT2
OUT1
OUT1
A1
B1
C1
D1
D2
D3
C3
B3
A3
A2
(Bump D1):
(Bump C1):Drain connections of the internal PMOS
pin and ground plane. Also connect the Schottky
15 and 16
2 and 3
Pin #
DAP
14
13
12
10
11
9
7
6
4
1
5
8
Name
V
V
Pgnd
Agnd
Cntrl
DAP
En2
En1
OUT2
OUT1
V
NC
NC
NC
NC
Sw
Fb
IN
OUT2
OUT1
if V
White LED Current Control Connection
Feedback Voltage Connection
Drain Connections of the NMOS and PMOS Field Effect Transistor (FET) Switches
(Figure 1: N2 and P1). Connect 100nF at V
Over-Voltage Protection (OVP) and Source Connection of the PMOS FET Switch
(Figure 1: P1)
Drain Connection of the Power NMOS Switch (Figure 1: N1)
Power Ground Connection
Analog Ground Connection
Input Voltage Connection
NMOS FET Switch Control Connection
PMOS FET Switch Control Connection
No Connection
No Connection
No Connection
No Connection
Die Attach Pad (DAP), to be soldered to the printed circuit board’s ground plane for
enhanced thermal dissipation.
pin to minimize trace
OUT2
is not used for
3
V
pacitor should be as close to the device as possible, be-
tween the V
En2 (Bump A3): Enable pin for the internal NMOS FET
switch (Figure 1: N2) during device operation. When V
≥ 1.4V, the internal NMOS FET switch turns off and the SUB
display is turned on. The En2 pin has an internal pull down
circuit, thus the internal NMOS FET switch is normally in the
on state of operation with the SUB display turned off. When
V
the SUB display is turned off. If both V
0.3V the LM3503 will shutdown. If V
must be floating or grounded and En1 used to enable the
device.
En1 (Bump A2): Enable pin for the internal PMOS FET
switch (Figure 1: P1) during device operation. When V
≤ 0.3V, the internal PMOS FET switch turns on and the MAIN
display is turned off. When V
FET switch turns off and the MAIN display is turned on. If
both V
The En1 pin has an internal pull down circuit, thus the
internal PMOS FET switch is normally in the on state of
operation with the MAIN display turned off. If V
used, En2 must be grounded and En1 use to enable the
device.
IN
En2
(Bump B3): Input voltage connection pin. The C
is ≤ 0.3V, the internal NMOS FET switch turns on and
En1
Description
and V
IN
pin and ground plane.
OUT2
En2
are ≤ 0.3V the LM3503 will shutdown.
node if V
En1
OUT2
is ≥ 1.4V, the internal PMOS
is not used
OUT2
En1
is not used, En2
and V
www.national.com
OUT2
En2
IN
is not
En2
En1
are ≤
ca-
is
is