LM3503SQ-35/NOPB National Semiconductor, LM3503SQ-35/NOPB Datasheet - Page 6

• Manufacturer Part Number: LM3503SQ-35/NOPB
• Description: IC LED DRIVER WHTE BCKLGT 16-LLP
• Manufacturer: National Semiconductor
• Series: PowerWise®r
• Type: Backlight, White LEDr

Specifications of LM3503SQ-35/NOPB

• Constant Current: Yes
• Topology: PWM, Step-Up (Boost)
• Number Of Outputs: 2
• Internal Driver: Yes
• Type - Primary: Backlight
• Type - Secondary: White LED
• Frequency: 800kHz ~ 1.2MHz
• Voltage - Supply: 2.5 V ~ 5.5 V
• Voltage - Output: 33 V ~ 34 V
• Mounting Type: Surface Mount
• Package / Case: 16-LLP
• Operating Temperature: -40°C ~ 85°C
• Current - Output / Channel: 750mA
• Internal Switch(s): Yes
• Efficiency: 80%
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LM3503SQ-35; LM3503SQ-35NOPB; LM3503SQ-35NOPBTR; LM3503SQ-35NOPBTR; LM3503SQ-35TR

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I
UVP
OVP
V
V
V
I
I
I
V OUT2
En1
En2
CNTRL
Symbol
En1
En2
Cntrl
Electrical Characteristics
typeface apply over the full operating junction temperature range (−40˚C ≤ T
2.5V. (Continued)
Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical characteristic specifications do not apply when
operating the device outside of its rated operating conditions.
Note 2: The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF capacitor discharged
directly into each pin.
Note 3: Current flows into the pin.
Note 4: The maximum allowable power dissipation is a function of the maximum junction temperature, T
the ambient temperature, T
using: P
please refer to Application Note 1187(An1187): Leadless Leadframe Package (LLP) and Application Note 1112(AN1112) for microSMD chip scale package.
Note 5: The on threshold indicates that the LM3503 is no longer switching or regulating LED current, while the off threshold indicates normal operation.
Note 6: All voltages are with respect to the potential at the GND pin.
Note 7: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.
Note 8: NMOS Power On Resistance measured at I
D(MAX)
V
Current (Note 3)
Under-Voltage
Protection
Over-Voltage
Protection (Note 5)
PMOS FET Switch
and Device Enabling
Threshold (Figure 1:
P1)
NMOS FET Switch
and Device Enabling
Threshold (Figure 1:
N2)
V
En1 Pin Bias Current
(Note 3)
En2 Pin Bias Current
(Note 3)
Cntrl Pin Bias Current
(Note 3)
OUT2
Cntrl
= (T
J(MAX
Range
Parameter
Pin Leakage
)–T
A
. See Thermal Properties for the thermal resistance. The maximum allowable power dissipation at any ambient temperature is calculated
A
)/ θ
JA
. Exceeding the maximum allowable power dissipation will cause excessive die temperature. For more information on this topic,
Fb = En1 = En2 = 0V, V
On Threshold
Off Threshold
On Threshold (16)
Off Threshold (16)
On Threshold (25)
Off Threshold (25)
On Threshold (35)
Off Threshold (35)
On Threshold (44)
Off Threshold (44)
Off Threshold
On Threshold
Off Threshold
On Threshold
V
En1 = 2.5V
En1 = 0V
En2 = 2.5V
En2 = 0V
Cntrl = 2.5V
IN
= 3.6V
SW
(Notes 6, 7) Limits in standard typeface are for T
= 250mA for sixteen voltage version.
Conditions
OUT2
6
= V
OUT1
= 42V
J
≤ +125˚C). Unless otherwise specified,V
J(MAX
), the junction-to-ambient thermal resistance, θ
14.5
14.0
22.5
21.5
32.0
31.0
40.5
39.0
Min
2.2
1.4
1.4
0.2
J
= +25˚C. Limits in bold
15.5
Typ
0.1
2.4
2.3
0.8
0.8
0.8
0.8
0.1
0.1
15
24
23
34
33
42
41
7
7
8
Max
16.5
16.0
25.5
24.5
35.0
34.0
43.5
42.0
2.5
0.3
0.3
3.5
14
14
14
3
IN
Units
JA
µA
µA
µA
µA
=
V
V
V
V
V
, and