MC33151PG ON Semiconductor, MC33151PG Datasheet - Page 7

• Manufacturer Part Number: MC33151PG
• Description: IC MOSFET DRIVER DUAL HS 8-DIP
• Manufacturer: ON Semiconductor
• Type: High Speedr

Specifications of MC33151PG

• Configuration: Low-Side
• Input Type: Inverting
• Delay Time: 35ns
• Current - Peak: 1.5A
• Number Of Configurations: 2
• Number Of Outputs: 2
• Voltage - Supply: 6.5 V ~ 18 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Through Hole
• Package / Case: 8-DIP (0.300", 7.62mm)
• Rise Time: 31 ns
• Fall Time: 32 ns
• Supply Voltage (min): 6.5 V
• Supply Current: 10.5 mA
• Maximum Power Dissipation: 1000 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• Number Of Drivers: 2
• Driver Configuration: Inverting
• Driver Type: High Speed
• Input Logic Level: CMOS/LSTTL
• Propagation Delay Time: 100ns
• Operating Supply Voltage (max): 18V
• Peak Output Current: 1.5A
• Power Dissipation: 1W
• Operating Supply Voltage (min): 6.5V
• Operating Supply Voltage (typ): 12V
• Turn Off Delay Time: 100fs
• Turn On Delay Time (max): 100ps
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 8
• Package Type: PDIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• High Side Voltage - Max (bootstrap): -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: MC33151PG; MC33151PGOS

the NPN pullup during the negative output transient, power
dissipation at high frequencies can become excessive.
Figures 20, 21, and 22 show a method of using external
Schottky diode clamps to reduce driver power dissipation.
Undervoltage Lockout
system operation at low supply voltages. The UVLO forces
the Drive Outputs into a low state as V
to the 5.8 V upper threshold. The lower UVLO threshold is
5.3 V, yielding about 500 mV of hysteresis.
Power Dissipation
enhanced with reduced die temperature. Die temperature
increase is directly related to the power that the integrated
circuit must dissipate and the total thermal resistance from
the junction to ambient. The formula for calculating the
junction temperature with the package in free air is:
where:
power to be dissipated when driving a capacitive load with
respect to ground. They are:
where:
supply voltage and duty cycle as shown in Figure 17. The
device’s quiescent power dissipation is:
where:
to the load capacitance value, frequency, and Drive Output
voltage swing. The capacitive load power dissipation per
driver is:
where:
load power P
gate to source capacitance C
in this calculation, power MOSFET manufacturers provide
An undervoltage lockout with hysteresis prevents erratic
Circuit performance and long term reliability are
There are three basic components that make up total
The quiescent power supply current depends on the
The capacitive load power dissipation is directly related
When driving a MOSFET, the calculation of capacitive
I
P
I
V
R
V
CCH
CCL
Q
qJA =
OH
C
T
P
P
P
P
P
OL
P
T
T
C
D = Output Duty Cycle
A
D
Q
C
T
= V
C
L
D =
J
J
f = frequency
is somewhat complicated by the changing
= T
= Junction Temperature
= Ambient Temperature
= Power Dissipation
= Quiescent Power Dissipation
= Capacitive Load Power Dissipation
= Transition Power Dissipation
= Supply Current with Low State Drive
= Supply Current with High State Drive
= V
= High State Drive Output Voltage
= Low State Drive Output Voltage
= Load Capacitance
CC
Thermal Resistance Junction to Ambient
P
Outputs
Outputs
A
Q
CC
+ P
+ P
I
CCL
(V
D
C
OH
GS
+ P
(R
(1−D) + I
as the device switches. To aid
− V
qJA
T
)
OL
) C
CCH
CC
L
(D)
f
rises from 1.4 V
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7
gate charge information on their data sheets. Figure 18
shows a curve of gate voltage versus gate charge for the ON
Semiconductor MTM15N50. Note that there are three
distinct slopes to the curve representing different input
capacitance values. To completely switch the MOSFET
‘on’, the gate must be brought to 10 V with respect to the
source. The graph shows that a gate charge Q
required when operating the MOSFET with a drain to source
voltage V
The capacitive load power dissipation is directly related to
the required gate charge, and operating frequency. The
capacitive load power dissipation per driver is:
The flat region from 10 nC to 55 nC is caused by the
drain−to−gate Miller capacitance, occurring while the
MOSFET is in the linear region dissipating substantial
amounts of power. The high output current capability of the
MC34151 is able to quickly deliver the required gate charge
for fast power efficient MOSFET switching. By operating
the MC34151 at a higher V
provided to bring the gate above 10 V. This will reduce the
‘on’ resistance of the MOSFET at the expense of higher
driver dissipation at a given operating frequency.
simultaneous conduction of internal circuit nodes when the
Drive Outputs change state. The transition power
dissipation per driver is approximately:
performed with fixed capacitive loads. Figure 14 shows that
for small capacitance loads, the switching speed is limited
by transistor turn−on/off time and the slew rate of the
internal nodes. For large capacitance loads, the switching
speed is limited by the maximum output current capability
of the integrated circuit.
The transition power dissipation is due to extremely short
Switching time characterization of the MC34151 is
8.0
4.0
16
12
0
0
MTM15N50
I
T
D
P
P
P
A
DS
2.0 nF
= 15 A
C(MOSFET)
T
T
= 25°C
Figure 18. Gate−To−Source Voltage
= V
must be greater than zero.
of 400 V.
CC
40
(1.08 V
versus Gate Charge
= V
Q
g
, GATE CHARGE (nC)
C
CC
V
Q
DS
g
CC
C
= 100 V
f
80
L
, additional charge can be
f − 8 y 10
8.9 nF
−4
C
120
GS
)
g
=
V
of 110 nC is
DS
D V
D Q
= 400 V
GS
g
160