IRS2336SPBF International Rectifier, IRS2336SPBF Datasheet - Page 19

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IRS2336SPBF

Manufacturer Part Number
IRS2336SPBF
Description
IC DRIVER BRIDGE 3-PHASE 28-SOIC
Manufacturer
International Rectifier
Datasheet

Specifications of IRS2336SPBF

Configuration
3 Phase Bridge
Input Type
Differential
Delay Time
530ns
Current - Peak
200mA
Number Of Configurations
1
Number Of Outputs
3
High Side Voltage - Max (bootstrap)
600V
Voltage - Supply
10 V ~ 20 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
IRS2336x(D) Family
Switching and Timing Relationships
The relationship between the input and output signals of the IRS2336(D) and IRS23364D are illustrated below in
Figures 3 and 4. From these figures, we can see the definitions of several timing parameters (i.e., PW
, PW
, t
,
IN
OUT
ON
t
, t
, and t
) associated with this device.
OFF
R
F
Figure 3: Switching time waveforms (IRS2336(D))
Figure 4: Switching time waveforms (IRS23364D)
The following two figures illustrate the timing relationships of some of the functionality of the IRS2336xD; this
functionality is described in further detail later in this document.
During interval A of Figure 5, the HVIC has received the command to turn-on both the high- and low-side switches at
the same time; as a result, the shoot-through protection of the HVIC has prevented this condition and both the high-
and low-side output are held in the off state.
Interval B of Figures 5 and 6 shows that the signal on the ITRIP input pin has gone from a low to a high state; as a
result, all of the gate drive outputs have been disabled (i.e., see that HOx has returned to the low state; LOx is also
held low), the voltage on the RCIN pin has been pulled to 0 V, and a fault is reported by the FAULT output
transitioning to the low state. Once the ITRIP input has returned to the low state, the output will remain disabled and
the fault condition reported until the voltage on the RCIN pin charges up to V
(see interval C in Figure 6); the
RCIN,TH
charging characteristics are dictated by the RC network attached to the RCIN pin.
During intervals D and E of Figure 5, we can see that the enable (EN) pin has been pulled low (as is the case when
the driver IC has received a command from the control IC to shutdown); this results in the outputs (HOx and LOx)
being held in the low state until the enable pin is pulled high.
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