TC4467MJD Microchip Technology, TC4467MJD Datasheet - Page 4

IC MOSFET DVR QUAD NAND 14CDIP

TC4467MJD

Manufacturer Part Number
TC4467MJD
Description
IC MOSFET DVR QUAD NAND 14CDIP
Manufacturer
Microchip Technology
Type
Microcontrollerr
Datasheet

Specifications of TC4467MJD

Configuration
Low-Side
Input Type
NAND
Delay Time
40ns
Current - Peak
1.2A
Number Of Configurations
4
Number Of Outputs
4
Voltage - Supply
4.5 V ~ 18 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Through Hole
Package / Case
14-CDIP (0.300", 7.62mm)
Rise Time
25 ns
Fall Time
25 ns
Supply Voltage (min)
4.5 V
Supply Current
4 mA
Maximum Power Dissipation
840 mW
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 55 C
Number Of Drivers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
High Side Voltage - Max (bootstrap)
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Manufacturer
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TC4467/TC4468/TC4469
ELECTRICAL SPECIFICATIONS (OPERATING TEMPERATURES)
TRUTH TABLE
DS21425B-page 4
Electrical Characteristics: Unless otherwise noted, over operating temperature range with 4.5 V
Input
Logic 1, High Input Voltage
Logic 0, Low Input Voltage
Input Current
Output
High Output Voltage
Low Output Voltage
Output Resistance
Peak Output Current
Continuous Output Current
Latch-Up Protection Withstand
Reverse Current
Switching Time (Note 1)
Rise Time
Fall Time
Delay Time
Delay Time
Power Supply
Power Supply Current
Power Supply Voltage
Note
Legend: H = High
Outputs TC446X
Part No.
Inputs A
Inputs B
1:
2:
3:
Totem pole outputs should not be paralleled because the propagation delay differences from one to the other could cause one driver to
drive high a few nanoseconds before another. The resulting current spike, although short, may decrease the life of the device. Switching
times are ensured by design.
When driving all four outputs simultaneously in the same direction, V
will cause high-power dissipation in the device.
The input threshold has approximately 50 mV of hysteresis centered at approximately 1.5 V. Input rise times should be kept below 5 µsec
to avoid high internal peak currents during input transitions. Static input levels should also be maintained above the maximum, or below
the minimum, input levels specified in the "Electrical Characteristics" to avoid increased power dissipation in the device.
Parameters
L = Low
H
H
L
TC4467 NAND
H
H
L
Sym
V
V
V
V
I
V
R
I
t
t
I
DC
t
I
PK
t
D1
D2
IN
OH
OL
DD
I
R
F
S
IH
IL
O
H
H
L
V
DD
Min
-10
H
2.4
4.5
– 0.025
L
L
H
H
H
Typ
500
1.2
20
15
15
40
40
TC4468 AND
DD
H
L
L
will be limited to 16 V. This reduces the chance that internal dv/dt
Max
0.30
300
500
100
100
0.8
10
30
50
50
18
8
H
L
L
Units
nsec
nsec
nsec
nsec
mA
mA
mA
µA
V
V
V
V
A
V
L
L
L
Note 3
Note 3
0 V
I
I
I
Single Output
Total Package
4.5 V
Figure 4-1
Figure 4-1
Figure 4-1
Figure 4-1
Note 2
LOAD
LOAD
OUT
= 10 mA, V
V
= 100 µA (Note 1)
= 10 mA (Note 1)
IN
V
H
H
L
2002 Microchip Technology Inc.
DD
V
DD
V
TC4469 AND/INV
DD
Conditions
16 V
18 V.
DD
H
H
L
= 18 V
H
L
L
L
L
L

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