TLE7239GS Infineon Technologies, TLE7239GS Datasheet
TLE7239GS
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TLE7239GS Summary of contents
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... Serial Peripheral Interface (SPI 9.1 SPI Signal Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 9.2 Daisy Chain Capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 9.3 SPI Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 9.4 Register Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 9.5 Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 9.6 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 10 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 11 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 12 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Data Sheet 2 TLE7239GS Table of Contents Rev. 1.0, 2008-10-30 ...
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... A serial peripheral interface (SPI) is utilized for control and diagnosis of the device and the load. For direct control, there are two input pins available. The TLE7239GS provides a micro controller fail-safe function which is activated via a high signal at the limp home input pin. There is a power supply integrated in the device to ensure this functionality even without digital supply voltage ...
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... Suitable to switch 5 V power supply lines by auto configuring channels Data Sheet V 4.0 … 3.0 … 5 DS(ON) 0.9 Ω 1.6 Ω 0.9 Ω 0.9 Ω I L(nom, min) 260 mA 130 mA I 500 mA DS(OVL, min µA DS(OFF, max DS(CL, min) V -16 V bb(CL, max MHz SCLK(max) 4 TLE7239GS Overview Rev. 1.0, 2008-10-30 ...
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... This is realized by an integrated power supply, especially designed to fulfill cranking mode requirements (Vbb = 4 V) independent from digital power supply ( supply is available. Furthermore, the TLE7239GS is equipped with two input pins that can be individually routed to the output control of each channel thus offering complete flexibility in design and PCB-layout. The input multiplexer is controlled via SPI. ...
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... SUB 6 TLE7239GS Block Diagram VBB OUT0 OUT1 OUT2 OUT3 OUT6 OUT7 GND Overview _6_GS.emf Rev. 1.0, 2008-10-30 ...
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... IN1 OUT3 I I IN2 OUT_D4 TLE7239GS IN2 OUT_S4 VDD OUT_D5 SCLK OUT_S5 SCLK OUT_D6 SI OUT6 OUT_D7 SO OUT7 SUB GND SO I GND 7 TLE7239GS Block Diagram V bat V DS0 V V DS1 DS2 DS3 DS4 DS5 DS6 Terms _6_GS.emf V specification equivalent Out I in high-side configuration. ...
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... Source of auto configuring power transistor 5 Drain of low side power transistor channel 6 Drain of low side power transistor channel 7 Limp home activation input pin (pull down) Input multiplexer input 1 pin (pull down) Input multiplexer input 2 pin (pull down) 8 TLE7239GS Pin Configuration PG-SSOP -24-5.emf Rev. 1.0, 2008-10-30 ...
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... Pin Symbol I/O SPI SCLK Data Sheet Function SPI Chip select (pull up) Serial clock Serial data in Serial data out 9 TLE7239GS Pin Configuration Rev. 1.0, 2008-10-30 ...
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... V – -16 – Out_S V – 41 Out_D E AS – 65 – – 18 – – 50 – TLE7239GS Electrical Characteristics Unit Test Conditions V -16V max. 2 minutes V – V – A – V – V – V – 105 °C j( 0. 150 °C j( 0.250 A D( 105 °C ...
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... ESD ( < < pulse pulse Symbol Limit Values Min. Max bb(nom bb(ext), bb(ext),low T -40 150 j 11 TLE7239GS Electrical Characteristics Unit Test Conditions 105 °C j( 0.180 A D( 105 °C j( 0.180 – 0.3 V °C – °C – HBM Unit Conditions V – ...
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... Limit Values Min. Typ. Max. R – – 25 thJC,back R – – 25 thJC,top R – – 17 thJPin R – 90 – thJA,min R – 70 – thJA,300 R – 65 – thJA,600 R – 55 – thJA,2s2p 12 TLE7239GS Electrical Characteristics Unit Conditions 2) K/W 2) K/W 2) K/W 3) K/W 4) K/W 5) K Rev. 1.0, 2008-10-30 ...
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... GND is recommended (especially in case of EMI). DD 5.1 Operation Modes There is a limp home functionality implemented in the TLE7239GS, which is activated via pin LHI. Please refer to Section 5.2 for details. The device provides a sleep mode (stand by) to minimize current consumption, which also resets the register banks ...
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... Limp Home Mode: In limp home mode, the SPI write-registers are reset. The SPI interface is operating normally, so the limp home bit LHI as well as the diagnosis flags can be read, but no command is accepted until the device leaves the Limp home operation. Data Sheet 14 TLE7239GS Power Supply Rev. 1.0, 2008-10-30 ...
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... DD(PO) I – – 0 DD(Sleep) – – 20 – – 20 – – – – 200 wu(Sleep) t – – 1 bb(UVR) t – – 1 DD(UVR 13 TLE7239GS Power Supply Unit Test Conditions Ω < 1 all diagnosis off V µ LHI AWK ° ° 150 °C ...
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... MOSFET transistors. The gates of the high-side switches are controlled by charge pumps. 6.1 Input Circuit There are two input pins available at TLE7239GS, which can be configured to be used for control of the output stages. The INXn parameter of the input configuration register provide following possibilities: • ...
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... high side channel V DS(CL) V S(CL) GND Figure 5 Output Clamp Implementation Maximum Load Inductance During demagnetization of inductive loads, energy has to be dissipated in the TLE7239GS. This energy can be calculated with following equations – bb D(CL ⋅ ------------------------------- - ln ⋅ 1 ...
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... In input mode, a high signal at the input pin is equivalent to a SPI ON command and a low signal to SPI OFF command respectively. Please refer to Data Sheet t t and are designed equally. ON OFF t OFF Section 9.3 for details on SPI protocol. 18 TLE7239GS Power Stages t t SwitchOn .emf Rev. 1.0, 2008-10-30 ...
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... V – 1) 0.1 – µA – – µ µ 13 resistive load I – 100 = 250 – 100 = 120 – 100 = 250 µ resistive load I – 100 = 250 – 100 = 120 – 100 = 250 mA DS Rev. 1.0, 2008-10-30 TLE7239GS Power Stages R thja ...
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... B 2 010 B 2 011 B 2 Type Description rw Input Multiplexer Configuration Channel n 00 Channel n is switched off 01 Channel n is switched by input 1 10 Channel n is switched by input 2 11 Channel n is switched on 20 TLE7239GS Power Stages 1 0 INX0 INX2 INX4 INX6 rw Rev. 1.0, 2008-10-30 ...
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... Reverse Polarity Protection There is a reverse polarity protection implemented in the TLE7239GS. This protection has to be divided into two parts. First the protection of the control circuits and second in the protection of the power transistors. The control circuits are reverse polarity protected by protective measures in the ground connection. In case of reverse polarity, there is no current flow through the control circuits ...
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... Thermal shut down temperature 1) Not subject to production test, specified by design Data Sheet T = -40 °C to +150 ° ° Symbol min. I 0.5 Out(OVL) I 0.22 Out(OVL) t OFF(OVL) T 150 j(SC) 22 TLE7239GS Protection Functions Limit Values Unit Test Conditions typ. max. 1.0 A 0.5 A µ °C 170 Rev. 1.0, 2008-10-30 ...
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... Diagnostic Features The SPI of TLE7239GS provides diagnosis information about the device and about the load. The diagnosis information of the protective functions of channel n is latched in the diagnosis flags Dn cleared by the SPI command CMD.CPL = 1. The CPL command clears itself with the next valid SPI communication frame. ...
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... I 50 L(DC0.. D(OL4, L(DCHS L(DCLS) V D(OL6, L(DC6,7) Chapter 7) I 0.5 L(OVL) I 0.22 L(OVL) t – OFF(OVL) 24 TLE7239GS Diagnostic Features Uni Test Conditions t typ. max. µs – 250 – 1) – 3.9 V µA – 300 measured at threshold 1) – 2.2 V µA – 300 measured at threshold µ ...
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... Open load at OFF-state occurred 110 STB RST r/w r/w Description please refer to Section 7 for description please refer to Section 5.3 for description please refer to Section 5 for description please refer to Section 5 for description 25 TLE7239GS Diagnostic Features CPL r/w Rev. 1.0, 2008-10-30 ...
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... DCCR1 3 DCEN7 r/w Field Bits Type DCENn r Data Sheet 100 DCEN2 DCEN1 r/w r/w 101 DCEN6 DCEN5 r/w r/w Description Diagnosis Current Enable Channel n 0 Diagnosis current disabled 1 Diagnosis current enabled 26 TLE7239GS Diagnostic Features 0 DCEN0 r/w 0 DCEN5 r/w Rev. 1.0, 2008-10-30 ...
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... SPI Signal Description CS - Chip Select: The system micro controller selects the TLE7239GS by means of the CS pin. Whenever the pin is in low state, data transfer can take place. When high state, any signals at the SCLK and SI pins are ignored and SO is forced into a high impedance state. ...
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... Daisy Chain Capability The SPI of TLE7239GS provides daisy chain capability. In this configuration several devices are activated by the same CS signal MCS. The SI line of one device is connected with the SO line of another device (see which builds a chain. The ends of the chain are connected with the output and input of the master device, MO and MI respectively ...
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... SPI Protocol The control and diagnosis function of the TLE7239GS is based on two register banks which are accessed via following SPI protocol. The control register bank contains eight registers (with 4 bit each) addressed bit pointer. The diagnosis register bank contains four registers (with 4 bit each) addressed bit pointer. An additional indication bit is available to differentiate between standard diagnosis information and data read from a register bank ...
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... Failure mode alert of channel x and INX1 INX3 INX5 INX7 DCEN2 DCEN1 DCEN6 DCEN5 WAKE STB RST – – – V power-on, STB-command and RST-command bb 30 TLE7239GS Serial Peripheral Interface (SPI default INX0 0 H INX2 0 H INX4 0 H INX6 0 H DCEN0 0 H DCEN4 0 ...
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... CS SCLK SI t SO(en) SO Figure 12 Timing Diagram Data Sheet 3 OL1 B OL3 B OL5 B OL7 B t SCLK( SCLK(H) SCLK( SI(su) SI(h) t SO(v) 31 TLE7239GS Serial Peripheral Interface (SPI OL0 D3 OL2 D5 OL4 D7 OL6 t t CS(lag) CS(td) t SO(dis) SPI Timing.emf Rev. 1.0, 2008-10- 0.7V cc 0.2V cc 0. ...
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... V 0 SO( SO( -10 SO(OFF SCLK t 200 SCLK( SCLK( SCLK(L) t 250 CS(lead) t 250 CS(lag) t 250 CS(td SI(su SI(h) 32 TLE7239GS Serial Peripheral Interface (SPI -40 °C to +150 °C j Unit Test Conditions typ. max. V – 0.2* V – – V – µ µA – – 0. µA – ...
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... Not subject to production test, specified by design. Data Sheet 5.5V 16V, BAT ° Symbol Limit Values min. t – SO(en) t – SO(dis) t – SO(v) 33 TLE7239GS Serial Peripheral Interface (SPI -40 °C to +150 °C j Unit Test Conditions typ. max. C – 200 – 200 – 100 ...
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... Pb-free soldering according to IPC/JEDEC J-STD-020). For further information on alternative packages, please visit our website: http://www.infineon.com/packages Data Sheet B 0.1 B Seating Plane B 24x TLE7239GS Package Outlines 0.35 x 45˚ 3.9 ±0.1 8˚ MAX. 0˚...8˚ 6 ±0.2 0.2 ...
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... For further information you may contact Data Sheet D1 C1 VDD VBB OUT0 OUT1 OUT2 OUT3 IN1 IN2 LHI SCLK SI SO OUT6 OUT7 SUB GND Cooling area http://www.infineon.com/ 35 TLE7239GS Application Information Vbat Lowside Loads D3 Highside Loads Application_LGS.emf VBB pin (40 V). Rev. 1.0, 2008-10-30 ...
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... Revision History Revision Date Changes Rev. 1.0 2008-10-30 released Datasheet Data Sheet 36 TLE7239GS Revision History Rev. 1.0, 2008-10-30 ...
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... Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life ...