MCZ33977EGR2 Freescale Semiconductor, MCZ33977EGR2 Datasheet - Page 19

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MCZ33977EGR2

Manufacturer Part Number
MCZ33977EGR2
Description
IC DRIVER SGL GAUGE SPI 24-SOIC
Manufacturer
Freescale Semiconductor
Type
Single Gauge Driverr
Datasheet

Specifications of MCZ33977EGR2

Applications
Stepper Motor Driver, 2 Phase
Number Of Outputs
1
Current - Output
100mA
Voltage - Supply
6.5 V ~ 26 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
24-SOIC (7.5mm Width)
Operating Supply Voltage
4.5 V to 5.5 V
Supply Current
1.8 mA
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Load
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCZ33977EGR2
Manufacturer:
ACC
Quantity:
92
DEFAULT MODE
internal or external reset prior to SPI communication. An
internal reset occurs during V
below 4.0 V. An external reset is initiated by the RST pin
driven to Logic [0]. With the exception of the RTZCR full step
time, all of the specific pin functions and internal registers will
operate as though all of the addressable configuration
register bits were set to Logic [0]. This means, for example,
[deleted PV that] the outputs will be disabled after a power-
up or external reset, and SO flag OD6 and OD8 are set,
indicating an undervoltage event. Anytime an external reset
is exerted and the default is restored, all configuration
parameters [replaced e.g. with such as] such as clock
calibration, maximum speed, and RTZ parameters are lost
and must be reloaded.
FAULT LOGIC REQUIREMENTS
they occur:
• Overtemperature fault
• Undervoltage V
• Overvoltage V
• Clock Out of Specification [Formalized spec]
of the SO pin with a valid SPI message.
likely an overcurrent condition will become a thermal issue
and be reported.
OVERTEMPERATURE FAULT REQUIREMENTS
circuitry, shutting off the gauge driver when an excessive
temperature is detected. In the event of a thermal overload,
the gauge driver is automatically disabled and the fault is
flagged via the OT device status bit. The indicating flag
Analog Integrated Circuit Device Data
Freescale Semiconductor
Default mode refers to the state of the 33977 after an
The 33977 device indicates each of the following faults as
These fault bits remain enabled until they are clocked out
Overcurrent faults are not reports directly; however, it is
The 33977 incorporates overtemperature protection
PWR
PWR
DD
power-up or if V
PWR
falls
continues to be set until the gauge is successfully re-enacted,
provided the junction temperature has fallen below the
hysteresis level.
OVERVOLTAGE FAULT REQUIREMENTS
the maximum specified in Maximum Ratings,
levels resulting in an overvoltage shutdown condition can
result in uncertain pointer positions. Therefore, the pointer
position should be re-calibrated. The master will be notified of
an overvoltage event via the SO pin if the device status is
selected. Overvoltage detection and notification occurs
regardless of whether the gauge(s) are enabled or disabled.
OVERCURRENT FAULT REQUIREMENTS
device to rely on thermal shutdown to protect itself.
UNDERVOLTAGE FAULT REQUIREMENTS
pointer positions. Therefore, the internal clock and the pointer
position may require re-calibration. The state machine
continues to operate with V
V; however, the coil voltages may be clipped. Notification of
an undervoltage event is provided via the SO pin.
RESET (SLEEP MODE)
level falls below the V
powers up in the Default mode. See Static Electrical
Characteristics table under the sub-heading: Power Input in
Table
the device resets to its default state. The device consumes
the least amount of current (I
is Logic [0]. This is also referred to as the Sleep mode.
The device is capable of surviving V
Outcome currents are limited to safe levels allowing the
Undervoltage V
The device can reset internally or externally. If the V
3. Similarly, if the RST pin is driven to Logic [0], then
PWR
DDUV
conditions may result in uncertain
FUNCTIONAL DEVICE OPERATION
PWR
level, the device resets and
DD
and I
voltage levels as low as 4.0
PWR
OPERATIONAL MODES
PWR
) when the RST pin
voltages within
Table
2. V
DD
33977
PWR
19

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