LM96080CIMT/NOPB National Semiconductor, LM96080CIMT/NOPB Datasheet - Page 18

• Manufacturer Part Number: LM96080CIMT/NOPB
• Description: IC HARDWARE MONITOR 24-TSSOP
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of LM96080CIMT/NOPB

• Function: Hardware Monitor
• Topology: ADC (Sigma Delta), Comparator, Fan Speed Counter, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 125°C, External Sensor
• Output Type: I²C™
• Output Alarm: No
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 24-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LM96080CIM

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8.1 Temperature Data Format
Temperature data can be read from the Temperature Read-
ing Register (address 27h). Temperature limits can be read
from and written to the Hot Temperature, Hot Temperature
Hysteresis, OS Temperature, and OS Temperature Hystere-
sis Limit Registers (addresses 38h - 3Bh). These limits are
also referred to as T
Each limit is represented by an 8-bit, two's complement word
with an LSb (Least Significant Bit) equal to 1°C:
By default, Temperature Reading Register is represented by
a 9-bit two's complement digital word with the LSb having a
resolution of 0.5°C:
Temperature Register data can also be represented by a 12-
bit two's complement digital word with a LSb of 0.0625°C:
Temperature
Temperature
Temperature
(−0.0625)°C
+0.0625°C
+125°C
+125°C
+125°C
+1.0°C
−1.0°C
+1.5°C
−0.5°C
+1.0°C
+25°C
−25°C
−55°C
+25°C
−25°C
−55°C
+25°C
+0°C
+0°C
0°C
hot
, T
0111 1101 0000
0001 1001 0000
0000 0001 0000
0000 0000 0001
0000 0000 0000
1111 1111 1111
hot hyst
0 1111 1010
0 0011 0010
0 0000 0011
0 0000 0000
1 1111 1111
1 1100 1110
1 1001 0010
0111 1101
0001 1001
0000 0001
0000 0000
1111 1111
1110 0111
1100 1001
Binary
Binary
Binary
, T
Digital Output
Digital Output
Digital Output
os
, and T
os hyst
respectively.
0 FAh
1 CEh
7 D0h
F FFh
1 FFh
0 32h
0 03h
0 00h
1 92h
1 90h
0 10h
0 01h
0 00h
Hex
7Dh
C9h
Hex
Hex
FFh
E7h
19h
01h
00h
18
When using a single byte read, the 8 MSbs of the Tempera-
ture reading can be found at Value RAM (address 27h). The
remainder of the Temperature reading can be found in the
OS Configuration/Temperature Resolution Register (address
06h), bits 4-7. In 9-bit format, bit 7 is the only valid bit. In ad-
dition, all 9 or 12 bits can be read using a double byte read at
register address 27h.
8.2 Temperature Interrupts
There are four Value RAM WATCHDOG limits for the Tem-
perature reading that affect the INT and OS outputs of the
LM96080. They are: T
isters (addresses 38h - 3Bh). There are three interrupt modes
of operation: “Default Interrupt” mode, “One-Time Interrupt”
mode, and “Comparator Mode”. The OS output of the
LM96080 can be programmed for “One-Time Interrupt” mode
and “Comparator” mode. INT can be programmed for “Default
Interrupt” mode and “One-Time” Interrupt. These modes are
explained below and shown in the Temperature Interrupt Re-
sponse Diagram.
“Default Interrupt mode” operates in the following way: Ex-
ceeding T
initely until reset by reading Interrupt Status Register 1
(address 01h) or cleared by the INT_Clear bit in the Config-
uration register (address 00h, bit 3). Once an Interrupt event
has occurred by crossing T
cur again once the next temperature conversion has com-
pleted. The interrupts will continue to occur in this manner
until the temperature goes below T
Interrupt output will automatically clear.
“One-Time Interrupt” mode operates in the following way:
Exceeding T
definitely until reset by reading Interrupt Status Register 1 or
cleared by the INT_Clear bit in the Configuration register.
Once an Interrupt event has occurred by crossing T
reset, an Interrupt will not occur again until the temperature
goes below T
“Comparator” mode operates in the following way: Exceed-
ing T
remain Low until the temperature goes below T
the temperature goes below T
Temperature
os
(−1.0)°C
(−25)°C
(−55)°C
causes the OS output to go Low (default). OS will
hot
hot
causes an Interrupt that will remain active indef-
hot hyst
causes an Interrupt that will remain active in-
.
hot
1111 1111 0000
1110 0111 0000
1100 1001 0000
, T
hot hyst
hot
Binary
, then reset, an Interrupt will oc-
os hyst
Digital Output
, T
os
, OS will go high.
hot hyst
, and T
, at which time the
os hyst
os hyst
C 90h
F F0h
E 70h
Hex
Limit Reg-
hot
. Once
, then